MPU analyst returns to research with ARC
MPU analyst returns to research with ARC
By Peter Clarke, EE Times
July 21, 2000 (4:58 p.m. EST)
URL: http://www.eetimes.com/story/OEG20000721S0034
LONDON Keith Diefendorff, formerly senior analyst with Cahners MicroDesign Resources and editor-in-chief of the Microprocessor Report newsletter, has been recruited as vice president of research at ARC Cores Ltd. (Elstree, England), a developer of processor intellectual property. Diefendorff, an engineer with a background in processor architecture development, will be based in San Jose, Calif. He has been given the task of building a U.S. research and development group for ARC and has been made responsible for "blue sky" work at ARC. Jim Turley, vice president of marketing at ARC, denied that Diefendorff had been hired specifically to develop a follow-up generation of the ARC configurable RISC architecture. "It's not like we've dropped a particular project in Keith's lap. We've given Keith a very open job description. He gets to choose what he wants to do and how many people he wants to do it," said Turley. In the late '80s, Di efendorff was chief architect of the Motorola 88110 and went on in the early '90s to serve as Motorola's chief PowerPC architect. In the late '90s, prior to joining MicroDesign Resources, Diefendorff directed all of Apple's microprocessor efforts and was the architect of the Altivec multimedia-instruction-set extension to the PowerPC architecture.
Related News
- University of Edinburgh Develops an Advanced Research Processor based on the ARC600 Architecture
- Distinguished microprocessor architect, Keith Diefendorff, joins ARC Cores in research role
- Breaking Ground in Post-Quantum Cryptography Real World Implementation Security Research
- RIKEN adopts Siemens' emulation and High-Level Synthesis platforms for next-generation AI device research
- BrainChip Awarded Air Force Research Laboratory Radar Development Contract
Breaking News
- Baya Systems Raises $36M+ to Propel AI and Chiplet Innovation
- Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional Safety
- VeriSilicon and Innobase collaboratively launched second-generation Yunbao series 5G RedCap/4G LTE dual-mode modem IP
- ARM boost in $100bn Stargate data centre project
- MediaTek Adopts AI-Driven Cadence Virtuoso Studio and Spectre Simulation on NVIDIA Accelerated Computing Platform for 2nm Designs
Most Popular
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
- Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
E-mail This Article | Printer-Friendly Page |