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MataiTech LLC Includes OpenCores IP with an Update of its EDA Tool NAUET 1.5
Mataitech’s 4th generation EDA Tool, NAUET™ 1.5, now provides proven OpenCores IP, including the OpenRisc 1200, Wishbone bus, DMA, 10/100 MAC, HDLC, memory controller, USB Host/Slave, I2C, and more.
Rancho Santa Margarita, CA, United States -- September 4, 2006 -- MataiTech LLC enhances its co-development tool, NAUET™, by adding proven OpenCores IP. These Wishbone compliant IP blocks include the OpenRiSC 1200, DMA core, 10/100 Ethernet MAC, general purpose I/O, HDLC protocol, memory controller core, SPI master core, TDM controller core, USB function core, USB Host/Slave core, UART, I2C, I2S, and an IrDA core.
NAUET™ is MataiTech’s 4th generation co-development tool. Compatible with major EDA tools, NAUET™ automatically links IP blocks, generates Verilog, VHDL, C, SystemC, design documentation and test code. NAUET™ accelerates HDL coding and C/C++ coding to quickly allow engineers to begin application, driver and HDL development. Designs created with NAUET™ Component Editor are reusable as IP in later projects. NAUET™ Design Assembler is used to link multiple IP blocks into a single, larger design.
“The addition of this IP will dramatically reduce our customers’ time to market,” explained Rob Fleck, Principal Product Line Manager at MataiTech, “Vast portions of the development cycle are now automated, reducing the time for some tasks from weeks to minutes.”
The inclusion of proven OpenCores IP will accelerate MataiTech’s customers tremendously. Once customers download the IP from OpenCores they can put together a system on chip (SoC) and generate all the documentation, header files and test code with just a few clicks of the mouse.
“Customers can quickly link IP to create dozens of SoCs (system on chip) with NAUET™ and the proven OpenCores IP – all without royalties,” says Aaron Baranoff, MataiTech’s VP of Engineering.
The additional features offered by this release and the inclusion of the OpenCores IP bring NAUET™ to revision 1.5. The NAUET™ Basic Version has an introductory price of less than $1000.00 per license. MataiTech is a member of The SPIRIT Consortium. NAUET™ supports design-flow integration using the IP-XACT™ standard from SPIRIT.
About MataiTech
Located in Orange County California, MataiTech can bring designs to market faster than anybody in the industry. Our core engineering team has been using hardware/software co-simulation technology for years to help develop networking, encryption, parallel processing, multi-million gate ASICs, FPGAs and embedded operating systems for all industries. See www.mataitech.com for additional information.
Rancho Santa Margarita, CA, United States -- September 4, 2006 -- MataiTech LLC enhances its co-development tool, NAUET™, by adding proven OpenCores IP. These Wishbone compliant IP blocks include the OpenRiSC 1200, DMA core, 10/100 Ethernet MAC, general purpose I/O, HDLC protocol, memory controller core, SPI master core, TDM controller core, USB function core, USB Host/Slave core, UART, I2C, I2S, and an IrDA core.
NAUET™ is MataiTech’s 4th generation co-development tool. Compatible with major EDA tools, NAUET™ automatically links IP blocks, generates Verilog, VHDL, C, SystemC, design documentation and test code. NAUET™ accelerates HDL coding and C/C++ coding to quickly allow engineers to begin application, driver and HDL development. Designs created with NAUET™ Component Editor are reusable as IP in later projects. NAUET™ Design Assembler is used to link multiple IP blocks into a single, larger design.
“The addition of this IP will dramatically reduce our customers’ time to market,” explained Rob Fleck, Principal Product Line Manager at MataiTech, “Vast portions of the development cycle are now automated, reducing the time for some tasks from weeks to minutes.”
The inclusion of proven OpenCores IP will accelerate MataiTech’s customers tremendously. Once customers download the IP from OpenCores they can put together a system on chip (SoC) and generate all the documentation, header files and test code with just a few clicks of the mouse.
“Customers can quickly link IP to create dozens of SoCs (system on chip) with NAUET™ and the proven OpenCores IP – all without royalties,” says Aaron Baranoff, MataiTech’s VP of Engineering.
The additional features offered by this release and the inclusion of the OpenCores IP bring NAUET™ to revision 1.5. The NAUET™ Basic Version has an introductory price of less than $1000.00 per license. MataiTech is a member of The SPIRIT Consortium. NAUET™ supports design-flow integration using the IP-XACT™ standard from SPIRIT.
About MataiTech
Located in Orange County California, MataiTech can bring designs to market faster than anybody in the industry. Our core engineering team has been using hardware/software co-simulation technology for years to help develop networking, encryption, parallel processing, multi-million gate ASICs, FPGAs and embedded operating systems for all industries. See www.mataitech.com for additional information.
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