English
Denali CTO: Formalize contract between hardware, software
Dylan McGrath, EE Times
(09/12/2006 5:37 PM EDT)
SANTA CLARA, Calif. — The semiconductor industry needs to revisit and redefine traditional boundaries between hardware and software, according to Mark Gogolewski, chief technology officer at intellectual property (IP) and EDA vendor Denali Software Inc.
Delivering the keynote address kicking off Denali's MemCon here Tuesday (Sept. 12), Gogolewski called for the industry to formalize the contract between hardware and software. This contract, he said, is represented by control registers, which represent the largest portion of a hardware functional specification or programmers guide.
"The registers go through constant change from the beginning of chip [design] to the end," Gogolewski said.
Paraphrasing an address given by Gary Smith, Gartner Dataquest's chief EDA analyst at the recent Design Automation Conference (DAC), said chip design costs have stayed relatively flat since 1997, but that overall IC development costs have grown considerably. Gogolewski, as Smith did, pointed to the cost of software development as the culprit.
(09/12/2006 5:37 PM EDT)
SANTA CLARA, Calif. — The semiconductor industry needs to revisit and redefine traditional boundaries between hardware and software, according to Mark Gogolewski, chief technology officer at intellectual property (IP) and EDA vendor Denali Software Inc.
Delivering the keynote address kicking off Denali's MemCon here Tuesday (Sept. 12), Gogolewski called for the industry to formalize the contract between hardware and software. This contract, he said, is represented by control registers, which represent the largest portion of a hardware functional specification or programmers guide.
"The registers go through constant change from the beginning of chip [design] to the end," Gogolewski said.
Paraphrasing an address given by Gary Smith, Gartner Dataquest's chief EDA analyst at the recent Design Automation Conference (DAC), said chip design costs have stayed relatively flat since 1997, but that overall IC development costs have grown considerably. Gogolewski, as Smith did, pointed to the cost of software development as the culprit.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related News
- New Integration Between SpaceStudio Hardware Software Co-design and European Space Agency’s TASTE Tool Set
- Initial members join CHERI Alliance to drive adoption of memory safety and scalable software compartmentalization
- Is Software and Hardware Ready for TinyML Tsunami?
- OpenHW Group Announces Tape Out of RISC-V-based CORE-V MCU Development Kit for IoT Built with Open-Source Hardware & Software
- Renesas Launches Integrated Development Environment That Enables ECU-Level Automotive Software Development Without Hardware
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards