Xilinx Delivers Virtex-5 LXT FPGAs With Industry's First Built-In PCI Express Block And Low-Power Serial I/O
World’s first 65-nm FPGAs with hardened protocol blocks and easy-to-use solutions
take serial connectivity mainstream
SAN JOSE, Calif., October 16, 2006 – Xilinx, Inc. (NASDAQ: XLNX), the world’s leading supplier of programmable solutions, today announced initial shipments of its Virtex™-5 LXT field programmable gate arrays (FPGAs). The second of four domain-optimized platforms in the new Virtex-5 family, the LXT platform series is the first FPGA to deliver a hard-coded PCI Express® Endpoint and Tri-mode Ethernet Media Access Controller (MAC) blocks. The Virtex-5 LXT platform also features the industry’s lowest power 65-nanometer (nm) transceiver, typically consuming less than 100mW per channel at 3.2 Gbps.
Xilinx has engaged with several customers in its early access program since June of this year. “Agilent’s high-end instruments are built for emerging markets and require a SoC platform with high-bandwidth connectivity and the time-to-market advantages of FPGAs,” said Mr. M. Heinen, R&D section manager at Agilent, one of a select number of early access customers. “The Xilinx Virtex-5 LXT platform provides us with the system performance we need, along with low-power and high-speed interfacing enabled by the 3.2 Gbps transceivers. Pin compatibility across multiple platforms allows us to scale up our design for future needs.”
Triple Play Drives Mainstream Adoption
The Virtex-5 LXT platform addresses the challenging bandwidth, power and cost targets facing equipment vendors working to enable the emerging ‘triple play’ services market (voice, video and data over single broadband Internet Protocol connection). The new platform is optimized to enable FPGA designers across a wide range of applications to benefit from serial connectivity by delivering a comprehensive, fully compliant protocol solution with the greatest ease of use.
“What started in the communication segment to improve bandwidth, cost and scalability is now becoming an industry-wide migration from parallel to serial interfaces across many applications within wired/wireless, video, storage, servers and consumer. A one-size-fits-all FPGA approach is no longer sufficient,” said Steve Douglass, vice president of Product Development at Xilinx. “The Virtex-5 LXT platform is the first of several high-speed serial platforms to be offered in the Virtex-5 family. The LXT platform is aimed at the large number of serial connectivity applications ranging from 100 Mbps to 3.2 Gbps.”
Industry Analysts Agree
In the multi-standard serial interface market, PCI Express and Gigabit Ethernet have emerged as the leading interface standards in markets served by FPGAs and are expected to account for over 80 percent of all port shipments in 2009.
“The industry is clearly adopting high-speed serial technology as the preferred connectivity solution. Serial provides better bandwidth, cost, power and scalability than alternative parallel interfaces,” said Steve Berry, principal analyst at Electronic Trend Publications. “Xilinx has established itself as the industry’s premier supplier of high-speed connectivity solutions through several generations of products, and their Virtex-5 LXT platform raises the bar even higher by providing solutions in the sweet spot of the market to a much broader community of designers.”
Virtex-5 LXT Platform
The Virtex-5 LXT platform delivers the industry’s first FPGA to offer a built-in PCI Express Endpoint block and tri-mode Ethernet MAC, which gives designers an off-the-shelf solution that saves time, reduces power consumption and frees up valuable FPGA fabric resources. Built on the 65-nm Virtex-5 platform with new ultra-fast ExpressFabric™ technology, proven ASMBL™ architecture and low-power triple-oxide technology, the Virtex-5 LXT platform delivers an average of 30 percent higher performance, 65 percent increased capacity and up to 35 percent reduction in dynamic power consumption over previous generation 90-nm FPGAs. The hardened PCI Express core saves users up to 10,000 LUTs and two watts of power as compared to soft intellectual property (IP) core implementations.
Key features and innovations of the Virtex-5 LXT family include:
- Industry’s lowest power transceivers: up to 24 RocketIO™ transceivers operating from 100 Mbps to 3.2 Gbps typically consuming less than 100mW per transceiver/receiver pair.
- Built-in PCI Express block: fully compliant endpoint block that works with the RocketIO GTP transceivers to provide x1, x2, x4 and x8 PCI Express interfaces.
- Built-in tri-mode Ethernet MAC blocks: four independent 10/100/1000 Mbps blocks that work seamlessly with RocketIO transceivers.
- Industry’s best signal integrity: eight programmable levels of Transmit Pre-emphasis and four programmable levels of Receive Equalization address even the most stringent channels. Advanced diagnostic capability with the Chipscope™ Pro software toolset gives engineers the best signal integrity solution available.
- Widest protocol support: the Virtex-5 RocketIO transceivers support a myriad of industry standards including PCI Express, Gigabit Ethernet, XAUI, SONET/SDH, CPRI and OBSAI, Serial RapidIO, HD-SDI and Fibre Channel.
- Off-the-shelf design solution: complete protocol-based solution consisting of software, IP cores, reference designs, development kits, characterization reports, protocol compliance certification, collateral and design support.
Pricing and Availability
Design software support for the Virtex-5 LXT platform is available this month. Virtex-5 LXT engineering samples are shipping now through the Xilinx Early Access Program in LX30T, LX50T, and LX110T densities, with LX85T and LX330T to follow over the next six months.
At volume production timeframes in 2008, the LX30T device will list for US$109, the LX50T for US$189 and the LX110T at US$529 in 1,000 unit volumes. These price points represent savings of more than 50 percent over competitive offerings for 90-nm FPGAs. For even further cost reductions, the Virtex-5 EasyPath™ program offers a 30 to 80 percent cost reduction and will be available at time of volume production. Xilinx will roll out complete, ready-to-go protocol solutions kits starting with the PCIe™ solutions kit in November 2006.
About Xilinx
Xilinx is the worldwide leader in complete programmable logic solutions. For more information, visit www.xilinx.com.
Electronic Trend Publications (Sep ’05)
|
Xilinx, Inc. Hot IP
Related News
- Xilinx Announces ChipScope Pro 9.1i Software - Extending Serial I/O Debug Capabilities to Support 65nm Virtex-5 LXT FPGAs
- Xilinx Virtex-5 FPGAs Achieve PCI Express Compliance - World's First FPGAs to Pass All v1.1 Specification Tests
- Xilinx Ships Virtex-5 FXT FPGAs, Delivering the Ultimate in System Integration for Designs That Demand High-Performance Processing and High-Speed Serial I/O
- Xilinx Virtex-5 LXT Platform FPGAs Used in NEC's SX-9; World's Fastest Vector Supercomputer
- Xilinx Teams With Industry Leaders to Accelerate Time-to-Market With Virtex-5 LXT FPGA Solutions for PCI Express
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |