Cadence Aligns with IBM to Accelerate ASIC Design with Cadence Logic-Design Team Technology
- IBM 65-nm ASIC Design Kit to Incorporate Cadence Synthesis and Test Technologies;
- Companies Will Jointly Support ASIC Kit Customers
The collaboration offers IBM's ASIC customers a proven way to address logic- design challenges before handoff to IBM, accelerating the completion of higher quality designs. ASIC customers will gain access to Cadence Test and Synthesis technologies when they receive the 65-nanometer IBM ASIC design kit.
"For nearly two years, IBM has worked closely with Cadence to ensure that our ASIC clients continue to benefit from a differentiated test methodology that helps reduce their test development resources by implementing automated test pattern generation and diagnosis," said Rich Busch, director, ASIC Products Business Unit, IBM Technology Collaboration Solutions. "This has been accomplished by using Cadence synthesis and test technologies which are key components of our methodology to deliver industry leading shipped-product quality level (SPQL)."
"We are delighted about the outcome of this effort with IBM and the benefits our ASIC customers will gain," said Jim Miller, executive vice president, Products and Technologies Organization. "The new design kit, leveraging Cadence technologies, will enable ASIC customers to complete 65-nanometer ASIC designs more predictably and with fewer iterations."
About Cadence
Cadence enables global electronic-design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2005 revenues of approximately $1.3 billion, and has approximately 5,200 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
|
Cadence Hot IP
Related News
- Cadence Genus Synthesis Solution Enables Toshiba to Complete a Successful ASIC Tapeout with a 2X Logic Synthesis Runtime Improvement
- Cadence and Samsung Foundry Accelerate Chip Innovation for Advanced AI and 3D-IC Applications
- Kudelski IoT and Dolphin Design unite to accelerate secure ASIC and IP projects
- Phison Deploys Cadence Cerebrus AI-Driven Chip Optimization to Accelerate Product Development
- Cadence Unveils New Palladium Z2 Apps with Industry's First 4-State Emulation and Mixed-Signal Modeling to Accelerate SoC Verification
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |