English
Brazil design team joins IP silicon club
Richard Wallace, EE Times
(12/07/2006 7:07 PM EST)
GRENOBLE, France — Brazil has joined the global silicon IP club by fielding an award-winning, first-pass MPEG-4 processor IP core that is one of the most complex VLSI designs ever developed in Brazil, a development destined to put South America on the world's growing list of system-on-chip IP providers.
A multi-university Brazilian design engineering team behind the IP silicon core worked under the auspices of Brazil's Ministry of Science and Technology. It took top honors and the "Best IP/SOC 2006 Design Award" in the university category at the annual IP-SOC Design Conference and Exhibition held here this week. The title of the winning paper was "Silicon Validated IP Cores Designed by the Brazil-IP Network" by authors by Ana Karina Rocha, Patricia Lira, Yang Yun Ju, Elmar Melcher, and Edna Barros.
The award recognized first-silicon success for an MPEG-4 IP core and other silicon IP in a system implementation designed using a unique VLSI design flow called ipPROSESS and a novel design methodology incorporating a VeriSC verification process.
(12/07/2006 7:07 PM EST)
GRENOBLE, France — Brazil has joined the global silicon IP club by fielding an award-winning, first-pass MPEG-4 processor IP core that is one of the most complex VLSI designs ever developed in Brazil, a development destined to put South America on the world's growing list of system-on-chip IP providers.
A multi-university Brazilian design engineering team behind the IP silicon core worked under the auspices of Brazil's Ministry of Science and Technology. It took top honors and the "Best IP/SOC 2006 Design Award" in the university category at the annual IP-SOC Design Conference and Exhibition held here this week. The title of the winning paper was "Silicon Validated IP Cores Designed by the Brazil-IP Network" by authors by Ana Karina Rocha, Patricia Lira, Yang Yun Ju, Elmar Melcher, and Edna Barros.
The award recognized first-silicon success for an MPEG-4 IP core and other silicon IP in a system implementation designed using a unique VLSI design flow called ipPROSESS and a novel design methodology incorporating a VeriSC verification process.
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