Ceva-Waves Bluetooth 5.3 Low Energy Baseband Controller, software and profiles
Denali Launches MLC NAND Flash Solutions for SoC Designs
PALO ALTO, Calif. -- Dec. 18, 2006 -- Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced its Databahn(TM) NAND Flash Controller IP product for high-capacity Multi-Level Cell (MLC) and traditional Single-Level Cell (SLC) NAND Flash memories. The Databahn NAND Flash controller and Spectra(TM) NAND Flash management software provide innovative multi-bit Error Correction Code (ECC) algorithms for ensuring data integrity and offer optimal wear leveling algorithms, power loss recovery and bad block management. The Databahn and Spectra products provide system-on-chip (SoC) developers with a comprehensive solution to minimize time-intensive hardware and software development, overcome inherent MLC NAND complexity, and leverage emerging MLC NAND Flash technologies.
NAND flash has become the storage medium of choice for a growing set of consumer electronic devices, including MP3 players, high-end cell phones, digital cameras, and Solid State Drives. As SoC developers transition to the higher capacity MLC NAND devices, they require comprehensive hardware and software solutions to achieve the necessary performance and reliability for new product designs.
"iSuppli expects that MLC NAND will represent 75% of global NAND shipment by the end of 2006 up from 34% in Q1 2006," states Nam Hyung Kim, director and principal analyst of Memory ICs and Storage Systems at iSuppli Corporation. "System developers will have to employ innovative design solutions to overcome the additional complexity of MLC NAND devices."
In close partnership with leading memory vendors, Denali's Databahn Flash controller IP was developed to support all the latest features such as multi-plane and cache read and write commands. Several multi-bit ECC options are offered for optimal address data integrity in SLC and MLC NAND flash devices. In addition, the solution supports all popular SoC processor architectures and operation systems.
"As consumer electronics devices migrate to higher-capacity MLC NAND devices, meeting design requirements for data-retention, reliability, and system performance have become significant problem," said Robert Pierce, senior director of Flash Products at Denali Software. "We are now providing developers with a system-level solution that includes all the necessary hardware, software, and validation environments for successful deployment of MLC NAND in a wide range of end applications."
About Databahn Flash Controller IP
Databahn Flash Controller IP is the optimal solution for developing NAND and OneNAND Flash systems. The architecture is fully configurable to address a wide range of requirements for silicon area, performance, power and device architectures. For more information about Databahn Flash Controller IP, visit: http://www.denali.com/products/databahn_flash.html .
About Denali Software
Denali Software, Inc. is a world-leading provider of electronic design automation (EDA) software and intellectual property (IP) for system-on-chip (SoC) design and verification. Denali delivers the industry's most trusted solutions for deploying PCI Express, NAND Flash and DDR DRAM subsystems. Developers use Denali's EDA, IP and services to reduce risk and speed time-to-market for electronic system and chip design. Denali is headquartered in Palo Alto, California and has offices around the world to serve the global electronics industry. More information about Denali, its products and services is available at www.denali.com.
|
Related News
- Arasan Chip Systems expands its storage IP Portfolio with ONFI 4.1 PHY and I/O PAD IP seamlessly integrated with its NAND Flash Controller IP for UMC 28nm SoC Designs
- Movellus Launches Maestro Intelligent Clock Network Platform for SoC Designs
- Synopsys Launches New ARC VPX DSP Processor IP for High-performance Signal Processing SoC Designs
- Arasan to demonstrate its SD Card UHS-II PHY IP and eMMC 5.1 PHY IP for 12nm SoC Designs at the 2019 Flash Memory Summit
- Arasan to demonstrate its SD Card UHS-II PHY IP and eMMC 5.1 PHY IP for 12nm SoC Designs at the 2018 Flash Memory Summit
Breaking News
- HPC customer engages Sondrel for high end chip design
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- TSMC drives A16, 3D process technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
E-mail This Article | Printer-Friendly Page |