eASIC's Embedded ARM926EJ Processor is Available For All
Santa Clara, California, January 4, 2007 - eASIC Corporation, a provider of Structured ASIC devices and Configurable Logic IP, today announced the immediate availability of an ARM926EJ processor, offered in eASIC’s Nextreme 90nm product family. Now, FPGA, ASIC and System-on-Chip designers can benefit from a low-cost, fast-turnaround design with no-minimum order quantity. Under the agreement signed between ARM [(LSE:ARM); (Nasdaq: ARMHY)] and eASIC, this partnership will enable a broad range of users to have access, for the first time, to a 32-bit CPU core on a configurable fabric, while meeting the power, price and performance requirements of their Structured ASIC or Platform Designs.
“eASIC is building a wide and deep IP portfolio to offer its customers the low-cost, flexibility and time-to-market advantages of design-reuse, and the ARM926EJ processor is a major milestone in this roadmap,” said Ronnie Vasishta, CEO of eASIC Corporation. “Our goal is to provide our customers with an affordable solution for implementing their own innovative products cost-effectively and with the ability to quickly react to market fluctuation. The digital consumer market, which is a major industry growth driver, dictates the need to reduce cost, shorten turnaround time and embrace flexibility. These benefits are made possible using a mask-less lithography, such as employed for our Nextreme fabric, and offering design reuse capabilities such as the ARM® processor. We are eager to provide our customers with this very valuable yet cheap silicon real-estate.”
“eASIC’s Structured ASIC product enables the ARM926EJ processor to be made available in a configurable fabric for mass usage,” said Mark Brass, Vice President Operations, Physical IP. “This offering can significantly broaden the users’ community of this processor, by eliminating the mask cost and allowing any volume production required, eASIC opens the opportunity to extend this product offering to a wide range of applications and emerging markets”.
Nextreme Product Family
The 90nm Nextreme devices offer a powerful combination of fast turnaround prototypes to quickly verify designs together with low-cost production devices for high-volume applications. Prototypes can be manufactured as fast as 3 weeks, using mask-less Direct-write eBeam and there is no mask charge and no minimum order quantity. The Nextreme features include system performance of up to 350MHz, densities ranging from 350K gates to 5 Million ASIC gates and up to 790 user I/Os.
The ARM926EJ Processor
The ARM926EJ processor features a Jazelle® technology-enhanced 32-bit RISC CPU, flexible size instruction and data caches, tightly coupled memory (TCM) interfaces, memory management unit (MMU). It also provides separate instruction and data AMBA® AHB™ interfaces particularly suitable for Multi-layer AHB-based systems. The ARM926EJ processor implements the ARMv5TEJ instruction set and includes an enhanced 16 x 32-bit multiplier, capable of single cycle MAC operations. This ARMv5TEJ instruction set includes 16-bit fixed point DSP instructions to enhance performance of many signal processing algorithms and applications as well as supporting Thumb® and Java byte code execution.
Availability
eASIC implemented the 32-bit ARM926EJ processor using its standard design flow and obtained 150MHz typical performance. The 90nm Nextreme family with the embedded ARM926EJ processor is available now and is well suited for use in a vast range of applications, including digital imaging, portable media players, wired communication, wireless communication, storage and industrial.
A development board is available for customers use.
About eASIC
eASIC is a fabless semiconductor company offering breakthrough Structured ASIC devices and Configurable Logic IP aimed at dramatically reducing the overall fabrication cost and time of customized semiconductor chips. Low-cost, high-performance and fast-turn ASIC and System-on-Chip designs are enabled through patented technology of FPGA-like programmable logic coupled with ASIC-like Via-layer customizable routing. This innovative fabric efficiently employs mask-less customization with Direct-write e-Beam, and thus allows eASIC to offer NRE-free Structured ASICs.
Founded in 1999, eASIC Corporation is privately held, headquartered in Santa Clara, California. Investors include Vinod Khosla, Kleiner Perkins Caufield and Byers (KPCB), Crescendo Ventures, and Evergreen Partners. www.eASIC.com
|
Related News
- Nios Embedded Processor Development Kit Now Available for Altera's Cyclone Devices
- RISC-V Low-Power Embedded Processor IP Core Now Available from CAST
- VeriSilicon's Neural Network Processor IP Embedded in Over 100 AI Chips
- BrainChip Demonstrates Company's Event-Based AI Neural Processor at Embedded Vision Summit
- CHIP Alliance's Newly Enhanced SweRV Cores Available to All for Free
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |