eASIC and MoreThanIP Partner to Deliver Tri-Mode (10/100/1000) Ethernet MAC Solutions for Nextreme Structured ASICs
MoreThanIP joins eASIC’s eZ-IP Alliance to expand IP portfolio for configurable fabric
Santa Clara, California and Karlsfled, Germany, January 29, 2007 - eASIC Corporation, a provider of Structured ASIC devices and Configurable logic IP, and MoreThanIP GmbH, a leading supplier of networking IP cores, today announced the immediate availability of a Tri-Mode (10/100/1000) Ethernet MAC core for eASIC’s 90nm Nextreme Structured ASIC Family. The dynamically configurable Tri-Mode Ethernet MAC core will enable engineers to build robust Ethernet line card, NIC card or switching applications operating at 10/100 or 1000Mbps (Gigabit Ethernet).
As a new member of eASIC’s eZ-IP Alliance, MoreThanIP will partner with eASIC to deliver UNH approved Ethernet solutions on Nextreme Structured ASICs in order to provide system designers with the advantages of low unit-cost, no mask charges, and fast turnaround alternative to FPGAs and cell-based ASICs.
"The unique performance/power/cost capabilities provided by eASIC’s Nextreme Structured ASICs will enable us to expand the reach of our Ethernet solutions to new markets that could not be served by other custom ICs", commented Francois Balay, CEO of MoreThanIP.
“We are excited with the valuable contribution that MoreThanIP brings to our growing IP portfolio”, said Jasbinder Bhoot, Senior Director of Marketing at eASIC Corporation. “This partnership supports our continuous focus on delivering cost-effective, highly-desired IP cores to our customers. Tri-Mode Ethernet MACs are becoming increasingly popular as the industry moves towards digital processing of triple play applications. This Ethernet solution in combination with Nextreme will provide FPGA designers a compelling alternative to rapidly develop lower-cost, lower-power designs without adding design risk."
The Tri-Mode Ethernet MAC Core
The 10/100/1000 MAC Core operates Full Duplex mode, supports transparent mode (for switching applications) and full Ethernet frame termination/generation (for NIC or line card applications). The Tri-Mode Ethernet MAC core seamlessly interfaces to any industry standard Gigabit Ethernet PHY device. MoreThanIP can also provide 1000Base-X PCS (Physical Coding Sub-layer) Core and SGMII, RMII, RGMII, SSSMII modules to implements low pin count interfaces.
The standard definition synthesizable core is now available in VHDL, Verilog or netlist formats.
About MoreThanIP
MoreThanIP, founded in 2000, is an expert in design and IP for high-speed communications, serial backplane and embedded system technologies. This includes design, specification and implementation of standard products, system architectures and customer-specific solutions. Combining its methodology with proven technical expertise based on over ten years of industry experience in hardware and software design, MoreThanIP generates rapid design cycles to meet time-to-market, functional and budgetary objectives. www.MoreThanIP.com
About eASIC
eASIC is a fabless semiconductor company offering breakthrough Structured ASIC devices and Configurable Logic IP aimed at dramatically reducing the overall fabrication cost and time of customized semiconductor chips. Low-cost, high-performance and fast-turn ASIC and System-on-Chip designs are enabled through patented technology of FPGA-like programmable logic coupled with ASIC-like Via-layer customizable routing. This innovative fabric efficiently employs mask-less customization with Direct-write e-Beam, and thus allows eASIC to offer NRE-free Structured ASICs.
Founded in 1999, eASIC Corporation is privately held, headquartered in Santa Clara, California. Investors include Vinod Khosla, Kleiner Perkins Caufield and Byers (KPCB), Crescendo Ventures, and Evergreen Partners. www.eASIC.com
|
Related News
- eASIC and ASIC Architect Partner to Deliver New High-Speed PCI Express and DDR2 Interfaces for Nextreme Structured ASICs
- MorethanIP announces new 10/100/1000 Ethernet MAC-NET Core enabling Layer 3 Protocol acceleration for wire-speed TCP/IP implementations
- MorethanIP releases a new 10/100Mbps Ethernet MAC Core HW- and SW- compatible with MorethanIP 10/100/1000 MAC
- MorethanIP releases a new version of its 10/100/1000 Ethernet MAC Core featuring a configurable 8/32-Bit Client interface
- MorethanIP's 10/100/1000 Ethernet MAC Version 3 now with register map and full statistics support
Breaking News
- Logic Design Solutions launches Gen4 NVMe host IP
- ULYSS1, Microcontroller (MCU) for Automotive market, designed by Cortus is available
- M31 is partnering with Taiwan Cooperative Bank to launch an Employee Stock Ownership Trust to strengthen talent retention
- Sondrel announces CEO transition to lead next phase of growth
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
Most Popular
- Arm's power play will backfire
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PUFsecurity Collaborate with Arm on PSA Certified RoT Component Level 3 Certification for its Crypto Coprocessor to Provide Robust Security Subsystem Essential for the AIoT era
E-mail This Article | Printer-Friendly Page |