Mentor Graphics and Cypress Semiconductor Announce Web-Based Delivery of Optimized IP Solutions for Programmable Communications Devices

Optimized CPLD Netlists of Inventra IP Cores Now Available Over the Web for Cypress Delta39K devices

SAN JOSE, Calif. - June 12, 2000 - Mentor Graphics Corp. (NASDAQ: MENT) and Cypress Semiconductor (NYSE: CY) today announced that a selection of Mentor Inventra[tm] Intellectual Property (IP) cores is now available for licensing and download over the World Wide Web, as optimized netlists, for use in the Cypress Delta39K[tm] family of complex programmable logic devices (CPLDs).

The partnership reinforces Mentor's targeted IP strategy to provide easy, web-based access to optimized CPLD and Field Programmable Gate Array (FPGA) netlists of select cores from its Inventra IP library. Optimized Inventra netlists for Cypress Delta39K programmable devices will simplify IP integration into system designs and dramatically accelerate time-to-market for applications in the high-growth data communications, telecommunications, computation and consumer markets.

Providing flexibility and time-to-market advantages, programmable logic devices (PLDs) have emerged as viable, cost-effective alternatives to development-intensive Application Specific Integrated Circuit (ASIC) solutions. The complexity, integration and functionality of today's PLDs allow designers to place entire digital subsystems on a single device. In addition, designers can make key system changes late in the development cycle, avoiding costly and time-consuming silicon re-spins.

Semiconductor industry research firm, Semico Research Corp. (Phoenix, Ariz.), predicts that the worldwide market in the year 2000 for CMOS FPGAs, PLDs, and CPLDs will surpass $3.9 Billion, an annual growth rate of 35-percent over 1999.

"Customers are looking to cut the time for searching and acquiring IP, along with getting the right tool set and having it all inter-operate correctly with the silicon," said Rich Wawrzyniak, senior analyst, ASIC Services. "Access to a large and proven library of IP allows programmable device vendors to focus more time and energy on differentiating their end product solutions, rather than redesigning common functions."

The selection of the Mentor Graphics® Inventra IP core library targeted to Cypress CPLDs, with corresponding netlists, is optimized for use in Mentor's FPGA Advantage[tm] or Cypress's HDL based Warp[tm] design tools. FPGA Advantage and Warp are HDL design solutions tailored to meet the needs of high-end FPGA designers. Both Mentor and Cypress's tools integrate graphical capture, simulation, synthesis, and management, replacing the traditional multi-vendor, multi-tool approach to FPGA/CPLD design.

"Developing partnerships with IP vendors like Mentor Graphics allows our customers to make efficient use of the Delta39K architecture and to streamline their development process to meet narrow market windows in the communications arena," said, Norm Taffe, Cypress director of marketing for the programmable logic division. "This initial group of IP cores is the beginning of a growing library of pre-qualified offerings that our customers can draw from, enabling them to focus on broader design issues." "This alliance with Cypress Semiconductor reinforces our targeted IP strategy, announced in March 2000, to offer our customers a web-based FPGA/CPLD IP solution," said Mick O'Brien, general manager of the Inventra IP division. "Industry-leading programmable logic vendors, such as Cypress Semiconductor, recognize that Mentor Graphics provides a comprehensive selection of commodity IP for evaluation, licensing and download over the web that they can integrate with the utmost confidence into their system designs."

Cypress Delta39K Family of CPLDs
Cypress's new Delta39K CPLDs will offer up to 350,000 usable gates, approximately ten times the size of today's largest CPLD. The family offers more embedded memory (240 Kbits for the 100,000-gate Delta39K100 than any other programmable logic device, including even the largest field-programmable gate arrays (FPGAs). Delta39K is also the first programmable logic device to embed First-in First Out (FIFO) control and dual-port memory arbitration logic into each specialty memory block. This significantly reduces the logic required, increases the system performance, and speeds the design cycle of any application utilizing FIFO or dual-port memory.

Licensing and Availability
Inventra IP cores for Cypress's line of high-performance CPLDs are available for licensing and download from the Mentor Graphics web site at http://www.mentor.com/inventra/fpga_program. The netlists of the available cores are validated and can be used in the FPGA Advantage or Warp design tools. Cypress plans to grow its library of available Inventra IP, beginning with one of Inventra's HDLC controllers. Mentor Graphics and Cypress are partnering to make at least 20 additional cores available for use with Delta39K CPLDs. For more information on the Mentor Graphics Inventra core portfolio, please contact your nearest Mentor Graphics sales representative or visit the Mentor Graphics website. For more information on Cypress PLDs, customers can call (800) 858-1810 in the U.S. or (408) 943-2600, or visit http://www.cypress.com.

About Cypress Semiconductor Corp.
Cypress Semiconductor Corp., headquartered in San Jose, California, provides high-performance integrated circuit solutions "By Engineers. For Engineers.[tm]" for fast-growing companies in fast-growing markets, including data communications, telecommunications, computation, consumer products, and industrial-control. With a focus on emerging communications applications, Cypress's product lines include networking-optimized and micropower static RAMs; high-bandwidth multiport and FIFO memories; high-density programmable logic devices; timing technology for PCs and other digital systems; and controllers for Universal Serial Bus (USB). Its shares are listed on the New York Stock Exchange under the symbol CY, and its web site is http://www.cypress.com.

About Mentor Graphics
Mentor Graphics Corp. (NASDAQ: MENT) is a world leader in electronic hardware and software design solutions, providing products and consulting services for the world's largest electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of more than $500 million and employs approximately 2,600 people worldwide. Company headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com.

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For more information, please contact:
Patti Atkins Mentor Graphics 503.685-1165 patti_atkins@mentor.com Jeremiah Glodoveza Benjamin Group/BSMG Worldwide 408.559.6090 jeremiah@benjamingroup.com	Louie Yan Cypress Semiconductor 408.943.2817 lry@cypress.com