Altera's FPGAs Are First to Demonstrate Support for PCI Express 2.0
See Demonstrations of Altera, PLDA and Molex Solutions for PCI-SIG’s Newly Announced 5-GT/s PCIe 2.0 Standard at DesignCon
DesignCon, Santa Clara, Calif., January 30, 2007—Altera Corporation (NASDAQ:ALTR) announced at DesignCon today that it is demonstrating support for the PCI Express (PCIe) 2.0 specification, as well as showing PCIe 1.1 and 2.0 signals on cables and backplanes, with its Stratix® II GX FPGAs. With up to 20 low-power transceivers, Stratix II GX family is the only high-density production FPGA capable of delivering 100 Gbps of aggregate bandwidth on FR-4 circuit boards and backplanes up to 1 m in length, using the new 5-GT/s PCIe 2.0 specification from PCI-SIG. The Altera® devices can also deliver up to 80 Gbps on 15 m of copper cable on a new cable specified by PCI-SIG last week. Live demonstrations showing Stratix II GX FPGAs’ support of the specifications are on display at DesignCon, Santa Clara, Calif., in Altera booth 503 and Molex booth 301.
Altera demonstrations showcase 5-GT/s PCIe 2.0 compliance using the Stratix II GX-based PLDA XpressGXII prototyping board. In another demonstration, Stratix II GX FPGAs reliably transmit data over an unprecedented 30 m (98 feet) of PCI Express cable at the PCIe 1.1 and 2.0 rate of 2.5Gbps, and on 1 m (39 inches) of FR‑4 backplane at the PCIe 2.0 rate of 5Gbps.
The unrivaled level of signal integrity performance, margin and robustness is made possible by exploiting the advanced channel-loss compensating features of Stratix II GX low-power transceivers, and by using on-chip voltage regulators to provide noise immunity. Molex is demonstrating 5-Gbps PCIe 2.0 capability using Stratix II GX transceivers over 15 m (49 feet) of their iPassTM PCIe cable and on 1 m of their I-TracTM backplane.
“Our first-mover advantage is a result of working closely with a number of PCI‑SIG members to aid in the development of the PCIe specifications,” said David Greenfield, senior director of product marketing for high-end FPGAs at Altera. “Furthermore, our partnership with PLDA during our companies’ PCIe 2.0 development gives us the ability to provide PCIe 2.0 IP targeted to the only PCIe 2.0- and PCIe 1.1-capable FPGAs in production today—the Stratix II GX family.”
About Altera and PLDA PCI Express Solutions
The PCIe 2.0 demonstration builds upon the PCIe solutions already developed by Altera and PLDA.
The PLDA XpressGXII prototyping board includes PLDA’s PCI Express intellectual property (IP) core, IP configuration software, and the corresponding test-bench and reference designs for x1, x2, x4 and x8 endpoint applications. PLDA XpressGXII includes everything needed to jumpstart and validate any PCIe application, and is ready for PCIe 2.0. For more information on PLDA boards and IP cores for Stratix II FPGAs, visit www.plda.com/products/board_pcie_gxII.php.
Altera’s PCI Express Development Kit, Stratix II GX Edition, includes a comprehensive solution to quickly evaluate and validate the functionality of Altera’s PCIe solutions. The Stratix II GX-based PCIe board included in the kit can be used as an x1, x4 or x8 PCIe add-in card for prototype development with PCIe motherboards. It can also be used as a stand-alone card, offering flexibility to support several high-speed protocols including Gigabit Ethernet, 10-Gigabit Ethernet, XAUI, and x1 or x4 Serial RapidIO® interconnects. For more information about the kit, visit www.altera.com/products/devkits/altera/kit-pciexpress_s2gx.html. For more information about PCIe solutions from Altera, visit www.altera.com/technology/high_speed/protocols/pci_exp/pro-pci_exp.html.
About Altera
Altera’s programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more at www.altera.com.
|
Related News
- Microsemi Announces PCI Express 2.0 SIG Certification for the Industry's Lowest Power SmartFusion2 SoC FPGAs and IGLOO2 FPGAs
- Altera's 40-nm Stratix IV GX FPGAs Achieve PCI-SIG Compliance for the PCI Express 2.0 Architecture
- NetEffect Adopts Denali's PCI Express 2.0 and IO Virtualization Technology Solutions
- Synopsys DesignWare USB 2.0 NanoPHY and PCI Express PHY IP Achieve Compliance in SMIC's 130-NM Process Technology
- Denali and LeCroy Demonstrate Industry-Leading PCIe 2.0 Solutions at PCI-SIG Developers' Conference
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |