Legend Design Technology released automatic memory IP characterization tools

LEGEND RELEASED AUTOMATIC MEMORY IP CHARACTERIZATION TOOLS

SUNNYVALE, Calif.--- June 2000 --- Legend Design Technology, Inc., a leading provider of IP characterization, and critical-path circuit simulation for deep submicron IC designs, announced today a new product called MemChar[tm] that addresses the automatic memory IP characterization for system-on-chip (SOC) designs. Unlike alternate methods, Legend's MemChar[tm] provides the benefits of automation, higher accuracy and performances. The process of MemChar[tm] is transparent, and can be repeated directly by Memory IP users.

The MemChar[tm] program has been developed to automate all processes in the Memory IP characterization flow efficiently, including the simulations and optimizations. Although a memory compiler can generate several tens of thousands of various instances, only one instance is needed to set up the automatic characterization flow of MemChar[tm]. For all other configurations in this memory compiler, the same 'setup' can be directly applied. The MemChar[tm] program has been used very successfully for memory compiler development.

For high performance designs in areas of networking and communication, MemChar[tm] is especially useful by its unique capability of doing on-chip embedded memory characterization. Since the input is the layout-extracted data of the 'exact' configuration, the characterization results can directly reflect the `on-chip' models, not through interpolated or extrapolated. Therefore, the margins can be well controlled, and the system performance can be accurately simulated.

About MemChar[tm]

The MemChar[tm] program consists of four modules:

1. Simulation Stimulus Generator
2. 'Critical-Path' Circuit Builder: SpiceCut [tm] 3. Circuit Simulation and Optimization Manager, and
4. Timing Database Generator

Based upon the parameter specifications from the data sheets, MemChar[tm] can automatically generate the simulation stimulus and controls. SpiceCut[tm] is used to generate the critical- path netlist for the circuit reduction and RC reduction. And, Circuit Simulation Manager such as HSPICE[tm] or PowerMill[tm] is called for running the simulations automatically in 'sweep' loops or in 'optimization' loops. The timing data is then obtained from the simulation results and organized as the timing database for the models.

To better serve the design teams in different locations, MemChar[tm] engines provide on-chip characterization services through the internet or intranet. MemChar[tm] has been set up for providing IC designers 'white-box' timing models of on-chip embedded memories. This 'two-way' usage can further enhance the design quality compared to the 'one-way' with only 'black-box' model provided.

About Legend Design Technology

Legend Design Technology, Inc. is a leading provider of IP characterization, and critical-path circuit simulation for deep submicron IC designs. In addition to EDA products, Legend also provides services such as memory IP characterization for high performance designs. Currently, Legend has more than 40 customers worldwide, including a number of first tier accounts. Legend is located at Sunnyvale, California, with distributors in Japan and Taiwan. Additional information about Legend is available at http://www.LegendDesign.com

Contact:

Jane Wei
Legend Design Technology, Inc.
Email: Marketing@LegendDesign.com
Tel: (408) 720-9168 ext. 15
Fax: (408) 720-1732