Frontier Design raises $9 Million in new funding from private investors.
FOR IMMEDIATE RELEASE
FRONTIER DESIGN RAISES $9 MILLION
IN NEW FUNDING FROM PRIVATE INVESTORS.
Funds to Be Used To Improve SystemC, Altera and Xilinx Design Flows
and to Increase Worldwide Sales and Marketing Efforts.
May 29, 2000, LEUVEN, BELGIUM -- Frontier Design today announced that it has secured $9 million in second round financing from a group of private investors located in the Netherlands. The same group of investors, Silverline, Ltd., also has invested an undisclosed amount in a startup company that will develop and commercialize products based on Frontier Design's speech related intellectual property and cores. In connection with these investments, Silverline's managing director, Mr. Cees Heikamp, will join Frontier Design's board of directors.
" We have been a customer of Frontier Design for more than a year now" said Mr. Heikamp . "All the way we have been impressed by the professionalism of Frontier's management and by the high quality work the company has performed for us. We also realized that Frontier's approach to build a balanced business on EDA tools, Silicon IP and Design Services has a lot of potential for financial growth. I am very pleased that, after our investment, I will be able to help Frontier with the further successful implementation of this plan."
Frontier Design will use the funds to increase its R&D, sales and marketing efforts. Herman Beke, Frontier's CEO said, "Up to now, Frontier has invested heavily in the creation of its C-to-SiliconTM design methodology, the A|RTTM family of EDA tools supporting the methodology, and a growing portfolio of IP-cores, developed with the methodology and the tools. This R&D effort has
culminated in the recent release of A|RT Designer, our cutting edge architectural synthesis tool that helps the designer to transform a system, described in the C-language, into an optimized hardware architecture and then automatically generates RT-level VHDL or Verilog for that architecture.
"Now we want to focus on making our EDA customers more productive in their preferred design flows," Beke added. "We will create three "tiger" teams at our EDA development facility in Leuven, Belgium. One team will be assigned to accelerate the integration of A|RT Designer in a SystemC based hardware/software co-design flow. The other two teams will each be assigned the task of improving the efficiency of our tools Xilinx and Altera FPGA design flows respectively.
"In addition to R&D investments, we also will focus more on the commercial aspects of the business. As a starter, we intend to vastly increase our marketing and sales effort in the US. We are planning to increase our world-wide headcount by about 50% in the next six to nine months. We are actively seeking sales and marketing people to join our dynamic organization. I hereby invite anyone who is interested to contact us as soon as possible."
* * *
About Frontier Design
Frontier Design was founded in 1997 to develop a next generation system level design methodology called A|RT (Algorithm to Register Transfer) and to sell innovative EDA products, complex intellectual property cores and design services based on this methodology. A|RT EDA tools start from a specification in the C-language. They are used by Verilog or VHDL hardware designers to improve design productivity and design quality, in terms of product cost, power consumption and performance. The A|RT design methodology supports existing system-level design flows provided by companies such as Cadence Design Systems (NYSE: CDN), Mentor Graphics (NASDAQ: MENT), Synopsys (NASDAQ: SNPS), and by offering a quick and easy path from the C-language to Verilog or VHDL.
System-level IP cores offered by Frontier Design include low bit-rate speech-compression, high performance, low-cost echo cancellation and others, as well as speech recognition and synthesis.
Frontier Design sells its tools, IP and design services from its facilities in California; Florida; Leuven, Belgium; Tiel, The Netherlands; Tokyo, Japan; and through a growing number of distributors and representatives in North America, Europe, Japan, and the Pacific Rim.
Frontier Design's World Wide Web site is http://www.frontierd.com . Please email inquiries to info@frontierd.com
Contacts:
Herman Beke Nancy B. Green
Frontier Design The William Baldwin Group
+32 16 39 14 11 +1 650 856 6192
herman_beke@frontierd.com nbg@william-baldwin.com
Related News
- eYs3D Microelectronics, Co. Raises $7 Million Series A from Leading Industry Strategic Investors for Vision/AI Chips
- Impinj Raises $19 Million in Private Funding Round; Prepares for Increased Demand for Item-level RFID Technology
- Microbridge Completes $5 Million Extension Round of Funding From an International Syndicate of Investors, Raises $12.5 Million to Date
- Cavendish Kinetics Raises $15.5 Million in Second-Round Funding; Additional Investors from US and Germany will Accelerate Progress in Ultra-Low Power Memory Technology
- Fractile raises $15m seed funding to develop radical new AI chip and unlock exponential performance improvements from frontier AI models
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |