CebaTech Announces CebaIP Platform for End-to-End Development of Data and Storage Networking ASICs or FPGAs
Update: Exar Corporation Acquires Altior Inc. to Provide Additional Growth in Data Compression (February 19, 2013)
Innovative platform provides unprecedented levels of integration in a solutions-based IP framework
EATONTOWN, NJ. – April 26, 2007 – CebaTech Inc., an innovative intellectual property (IP) developer using state of the art in-house electronic system level (ESL) development tools, today announced the development of the CebaIP Platform™. CebaTech’s modular approach to offering IP cores makes each configuration quick and easy for design engineers to integrate into their application-specific integrated circuits (ASICs) or field-programmable gate arrays (FPGAs).
The CebaIP Platform represents years of engineering experience in developing and deploying complex data and storage networking products. (See www.cebatech.com/media/Radar_Scope_CebaTech.pdf.) The platform is a protocol-complete hardware and software framework for developing end-to-end data and storage networking solutions. Using the CebaIP Platform’s integrated advanced direct memory access (DMA) controller with the OpenBSD software driver, designers are able to rapidly achieve complete data networking and storage product solutions.
The CebaIP Platform enables modular protocol-level connectivity between the media access controller (MAC) layer and host application layer interface. With supported data rates ranging from 1 Gb/s to 10 Gb/s, customers can choose from various platform configurations to meet the needs of their specific data and storage networking products. Implementation is supported for both ASICs and FPGAs.
“No other IP platform or subsystem offering dedicated to data and storage networking applications with this level of functional integration exists in the market,” said Chad Spackman, president of CebaTech. “Customers can choose from available platform configurations now, and grow with the platform over time to greater levels of integration and function to meet the changing demands of their respective markets.”
Platform configurations initially supported by the CebaIP Platform includes GZIP-based compression and decompression with optional advanced encryption standard (AES) support. A second configuration includes partial TCP/IP offload with optional link aggregation, VLAN, and large send offload (LSO) support. Both configurations are available with the CebaIP Platform advanced descriptor-based DMA controller and OpenBSD reference software driver.
GZIP-based compression and decompression is available now for initial customer engagements, with general availability in late second quarter of 2007. The partial TCP/IP offload configuration will be available in the third quarter of 2007. Future configurations — including full TCP/IP offload, Internet protocol security (IPSec), iSCSI initiator and target, RDMA, and advanced rule-based filtering—will be released in late 2007 and early 2008.
More information about CebaTech’s new CebaIP Platform and select CebaIP Cores™ can be found at the company’s web site: www.cebatech.com.
About CebaTech
CebaTech uses its innovative C2R Compiler™, along with a comprehensive silicon development methodology, to realize complex data and storage networking functions in easy-to-integrate intellectual property (IP) cores. CebaTech is privately held. For more information about the company, visit www.cebatech.com.
|
Related News
- Cebatech Announces GZIP Family of CebaIP Cores for Efficient High Speed Compression and Decompression inside Data and Storage Networking ASICs and FPGAs
- 7nm networking platform delivers unprecedented performance and configurability for data center ASICs
- Tundra Semiconductor Announces First End-to-End RapidIO Baseband Development Platform
- ARM Launches RealView Development Suite 3.0 for End-to-End Pre-Silicon Development
- MIPI Alliance Releases Camera Security Specifications for Flexible End-to-End Protection of Automotive Image Sensor Data
Breaking News
- Intel brings 3nm production to Europe in 2025
- RISC-V in Space Workshop 2025 in Gothenburg
- VeriSilicon introduces AcuityPercept: an AI-powered automatic ISP tuning system
- Avant Technology Partners with COSEDA Technologies to Enhance System-Level Software Solutions
- Tower Semiconductor and Alcyon Photonics Announce Collaboration to Accelerate Integrated Photonics Innovation
Most Popular
- Qualcomm initiates global anti-trust complaint about Arm
- Sarcina Technology launches AI platform to enable cost-effective customizable AI packaging solutions
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Tower Semiconductor and Alcyon Photonics Announce Collaboration to Accelerate Integrated Photonics Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |