Dolphin Integration launches a standard cell library with ultra-high density up to 30% savings
Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components, resilient to noise and drastic for low power-consumption, together with engineering assistance and product evolution customized to their needs.
SoC providers targeting the market of portable electronic devices and of highly complex SoCs mainly care about 2 major concerns: minimization of silicon costs and low power consumption.
This new library, SESAME uHDvLC, referring to its ultra High Density and very Low power Consumption – provides area savings up to 30%, while enabling power reduction up to 50%, compared to competition.
Of course SESAME uHDvLC benefits from the increasing advantages of a RCSL (Reduced Cell Stem Library):
- Highly customizable for specific designs
- A high design yield and reliability prior to Silicon thanks to a thorough Virtual Fab Process™
- A reduced time to market for processes besides mainstream
SESAME uHDvLC is the solution of choice for Mobile Phone, PDA, Portable Multimedia Players, Digital Camera and GPS.
Immediately available at TSMC 180, and readily ported to other technological processes, SESAME uHDvLC benefits from a unique « Try and Buy tutorial » for guiding its evaluation, not only for free, but for fun!
More information on http://www.dolphin.fr/flip/sesame/sesame_overview.html
|
Dolphin Design Hot IP
Related News
- Dolphin Integration introduces a new Panoply of Silicon IPs for reducing the 65 nm silicon area up to 10%
- Dolphin Integration introduces an ultra High Density Library decreasing the 130 nm logic area up to 30%
- Save up to 20 % of silicon area with Dolphin Integration's standard cell library SESAME uHD
- Ultra high density standard cell library SESAME uHD-BTF to enrich Dolphin Integration's panoply at TSMC 90 nm eF and uLL
- Dolphin Integration enable Dongbu HiTek's users to benefit from their ultra high density standard cell library
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |