English
Denali Announces Databahn DDR3 Memory Controller IP Product
Databahn IPs Enables High-Performance, Low-Power DDR3 Memory Systems
PALO ALTO, Calif. -- May 29, 2007 -- Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced the availability of its newest Databahn(TM) DDR memory controller IP, which supports the DDR3 DRAM architecture. The Denali DDR3 Databahn launch coincides with recent DDR3 DRAM product announcements from several DRAM vendors offering new devices that support data rates up to 1600Mb/s for a wide range of end product applications, ranging from networking to consumer products. Denali's Databahn memory controller IP enables optimal performance for a wide range of DDR3 memory system applications including video and media processing, signal and network processing, and various consumer product applications.
"The relentless march to higher-performance and lower-power memories has made it necessary for the industry to begin the transition to a new family of DRAMs that raise the performance bar and lower the power ceiling at the same time. Though PCs remain the most important volume driver for DRAMs, vanguard applications both in networking and a new high-performance consumer products marketplace are leading the charge to get these new DDR3 DRAM memories out into the market and into early production," says Lane Mason, Memory Market Analyst at Denali Software. "Across the industry, next-generation systems are requiring larger amounts of external memory with higher-bandwidths with lower-power consumption than are currently supported with today's high-volume DDR2 SDRAM. DDR3 DRAMs are now in the early stages of the scheduled transition to a higher-performance mainstream memory. Leading IC designers use Denali's DDR memory controller solutions to reduce development risk and increase time-to-market, to take advantage of the advanced capabilities of DDR3 DRAM."
The Databahn product is a comprehensive IP solution with a range of configurability and programmability options to support a given customer application. Denali's Databahn DDR memory controllers offer the most powerful, multi-port solution to satisfy system performance requirements in terms of bandwidth, latency, and power reduction.
"Today's consumer electronics require faster DDR memory systems while keeping power in check," said Brian Gardner, vice president of IP products for Denali. "Our Databahn DDR3 controller offers a proven solution with a wide-range of features."
About Databahn DDR Memory Solutions
With over 240 design wins and 93 chips in production silicon, Databahn is the industry leading IP solution for DDR memory systems. Databahn DDR controllers ensure interoperability with all the latest high-speed memory technologies as the configuration process is tightly integrated with Denali's database of memory component specifications, including all the latest SDRAM, DDR1, DDR2, DDR3, GDDR3, and LP-DDR devices from all major memory vendors. Deliverables include: RTL and synthesis scripts, silicon-independent DDR PHY, verification testbench, static timing analysis (STA) scripts, programmable register settings, and documentation. Databahn controllers are compliant with all the latest memory devices, and are silicon-proven in over 27 vendor process nodes. For the latest Databahn DDR memory solutions information, visit: http://www.denali.com/products/dram.
About Denali Software
Denali Software, Inc. is a world-leading provider of electronic design automation (EDA) software and intellectual property (IP) for system-on-chip (SoC) design and verification. Denali delivers the industry's most trusted solutions for deploying PCI Express, NAND Flash and DDR DRAM subsystems. Developers use Denali's EDA, IP and services to reduce risk and speed time-to-market for electronic system and chip design. Denali is headquartered in Palo Alto, California and has offices around the world to serve the global electronics industry. More information about Denali, its products and services is available at http://www.denali.com.
PALO ALTO, Calif. -- May 29, 2007 -- Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced the availability of its newest Databahn(TM) DDR memory controller IP, which supports the DDR3 DRAM architecture. The Denali DDR3 Databahn launch coincides with recent DDR3 DRAM product announcements from several DRAM vendors offering new devices that support data rates up to 1600Mb/s for a wide range of end product applications, ranging from networking to consumer products. Denali's Databahn memory controller IP enables optimal performance for a wide range of DDR3 memory system applications including video and media processing, signal and network processing, and various consumer product applications.
"The relentless march to higher-performance and lower-power memories has made it necessary for the industry to begin the transition to a new family of DRAMs that raise the performance bar and lower the power ceiling at the same time. Though PCs remain the most important volume driver for DRAMs, vanguard applications both in networking and a new high-performance consumer products marketplace are leading the charge to get these new DDR3 DRAM memories out into the market and into early production," says Lane Mason, Memory Market Analyst at Denali Software. "Across the industry, next-generation systems are requiring larger amounts of external memory with higher-bandwidths with lower-power consumption than are currently supported with today's high-volume DDR2 SDRAM. DDR3 DRAMs are now in the early stages of the scheduled transition to a higher-performance mainstream memory. Leading IC designers use Denali's DDR memory controller solutions to reduce development risk and increase time-to-market, to take advantage of the advanced capabilities of DDR3 DRAM."
The Databahn product is a comprehensive IP solution with a range of configurability and programmability options to support a given customer application. Denali's Databahn DDR memory controllers offer the most powerful, multi-port solution to satisfy system performance requirements in terms of bandwidth, latency, and power reduction.
"Today's consumer electronics require faster DDR memory systems while keeping power in check," said Brian Gardner, vice president of IP products for Denali. "Our Databahn DDR3 controller offers a proven solution with a wide-range of features."
About Databahn DDR Memory Solutions
With over 240 design wins and 93 chips in production silicon, Databahn is the industry leading IP solution for DDR memory systems. Databahn DDR controllers ensure interoperability with all the latest high-speed memory technologies as the configuration process is tightly integrated with Denali's database of memory component specifications, including all the latest SDRAM, DDR1, DDR2, DDR3, GDDR3, and LP-DDR devices from all major memory vendors. Deliverables include: RTL and synthesis scripts, silicon-independent DDR PHY, verification testbench, static timing analysis (STA) scripts, programmable register settings, and documentation. Databahn controllers are compliant with all the latest memory devices, and are silicon-proven in over 27 vendor process nodes. For the latest Databahn DDR memory solutions information, visit: http://www.denali.com/products/dram.
About Denali Software
Denali Software, Inc. is a world-leading provider of electronic design automation (EDA) software and intellectual property (IP) for system-on-chip (SoC) design and verification. Denali delivers the industry's most trusted solutions for deploying PCI Express, NAND Flash and DDR DRAM subsystems. Developers use Denali's EDA, IP and services to reduce risk and speed time-to-market for electronic system and chip design. Denali is headquartered in Palo Alto, California and has offices around the world to serve the global electronics industry. More information about Denali, its products and services is available at http://www.denali.com.
|
||||||
Related News
- Pixelworks Standardizes on Denali’s High-Performance DDR SDRAM Technologies
- Denali's Databahn Memory Controller IP Supports Cadence Encounter Synthesis
- Cray Implements Denali's Databahn Memory Controller Cores, Uses MMAV Software for Memory Modeling and Simulation
- Denali Databahn Memory Controller Core Once Again Selected By Silverback Systems For Storage Network Access Processor Family
- Denali Enables Mobile Electronics Market with Databahn Memory Controller Cores Optimized for Low-Power
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
|
E-mail This Article | 
|
|
Printer-Friendly Page |