Chipidea's New USB PHY Architecture for 1.8V Devices Offers Industry's Lowest Power Consumption for SoC Designers
Update: MIPS Technologies Acquires Chipidea (August 27, 2007)
Newest Offering From Industry’s Widest Portfolio of USB IP Technology Enables Fast Integration and Low Area Cost for Chip Designs in 45nm and 65nm
LISBON, Portugal-- June 1, 2007 --Chipidea, the world’s leading provider of analog/mixed-signal subsystems and intellectual property (IP), today introduced a new generation USB physical layer architecture using 1.8V IO devices that offers the industry’s lowest power consumption for System-on-Chip (SoC) designs in the 65nm and 45nm advanced technology nodes.
The new Chipidea architecture is the latest from the industry’s most complete line of USB IP offerings and provides a power consumption of around 70mW. The usage of 1.8V IO devices is an industry first and extends Chipidea’s USB catalog from IO devices of 3.3V and 2.5V to offer designers the widest range of options for their USB connectivity integration strategies.
Fully compliant with the USB 2.0 specification, Chipidea’s 1.8V USB PHY guarantees D+ and D- protection to withstand transient short-circuit voltage without damage. The core also features analog programmability for fine-tuning, allowing designers to achieve the best performance for their integrated systems. The IP is available as a standalone PHY or matched with a USB controller.
“We are offering a new generation of USB IP cores using 1.8V devices for designers that require the lowest power consumption,” said Celio Albuquerque, division director of Chipidea’s Physical Solutions Division. “This 1.8V platform extends our portfolio to a new IO device choice, while maintaining the advantages of our IP, including analog programmability, built-in self-test (BIST) and full USB2.0 compliance.”
Chipidea’s wide selection of certified USB cores is available at several of the industry’s leading foundries and advanced process nodes. The IPs have been certified to provide the industry’s greatest degree of design flexibility in the 0.18um, 0.13um, 90nm and 65nm process nodes. The company’s 1.8V USB PHY architecture is the latest addition to a line of wired interface IP that enjoyed revenue growth of 105 percent in 2005, far outpacing all other USB IP providers, according to market researcher Gartner Dataquest.
About Chipidea
Chipidea is the world's number one analog/mixed-signal merchant technology supplier targeting fast-growing market segments including wireless communications, digital media and consumer electronics. Chipidea supports blue-chip customers across the globe, has an impeccable reputation for delivering high-quality products and is known for its reliable execution. Chipidea licenses its technology to leading companies in all major markets, delivering everything from high-precision, and single-function blocks to full analog sub-systems. For more information: www.chipidea.com.
|
Related News
- Aplus to Provide Low-Power, Low Voltage (1.8V) Operation EEPROM Macro Solution at UMC
- USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP Cores for High Bandwidth, Low Power data communication in PCs, Mobiles, SSDs, and other Multimedia Devices.
- MIPI RFFE (RF Front-End Control Interface) v3.0 Master and Slave Controller IP Cores for ultimate control of your RF Front-end Cellular or Base station SoC's with Low Power Consumption and Reduced Latencies
- TSMC 12FFC silicon proven SERDES Phy IPs' for HDMI 2.1, PCIe Gen5, DDR4, USB 4 & MIPI Interfaces available immediately for your next SoC
- OmniVision Announces 4K Video Processor with Industry's Lowest Power Consumption and HEVC Compression Capability for Battery-Powered Security and Surveillance Applications
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |