CAST JPEG 2000 Encoder Core now Faster and More Capable
Second-generation core nearly doubles throughput speed and now integrates Tier-1 and Tier-2 functions to handle the biggest HDTV images without an external processor
Design Automation Conference, San Jose, California, June 4, 2007 — Semiconductor intellectual property (IP) provider CAST, Inc. today announced a new version of its successful JPEG 2000 Encoder Core. The new version is faster, requires no external processing, adds significant features, and is customizable and highly scalable. It will ship next quarter (Q307).
First introduced in 2002, CAST’s JPEG2K-E IP core is successfully in use by multiple military and aerospace customers for various demanding applications. It—and the new version—provide high-quality compression of still or video images using the JPEG 2000 standard (ISO/IEC 15444-1). This flexible JPEG 2000 standard offers both lossless and lossy compression, and it can achieve superior image quality with higher compression ratios (for smaller file sizes) than the ordinary JPEG standard. Though not yet widely used for web-based images, JPEG 2000 has proven invaluable for certain specialized applications. For example, frame-by-frame Motion JPEG 2000 is seen as the best technology for digital film compression, and has been adopted by the Digital Cinema Initiatives (DCI) consortium and others.
Built on already-proven code, the new version of the JPEG2K-E Encoder Core is a major advance that improves processing and makes it significantly easier to integrate JPEG 2000 in ASIC- or FPGA-based systems. It features:
- Nearly twice the processing speed of the previous version, with some of the fastest processing rates available: over 100 MSamples/sec for FPGAs and over 200 MSamples/sec for ASICs.
- A new rate control capability, by which image quality is maximized while maintaining a constant post-compression bit rate that satisfies a system’s transmission and decoding requirements.
- Expanded support for arbitrary large images, now handling frame sizes up to 4096 by 4096 pixels without tiling, ensuring efficient processing of even the largest HDTV images.
- Full hardware handling of both Tier-1 and Tier-2 JPEG 2000 encoding, eliminating the need to do Tier-2 encoding in software running on an additional processor.
This latter feature is most significant, as it means the JPEG2K-E does a more complete job than most similar cores, receiving pixel data and generating an immediately-usable, fully-compliant output stream with no extra processor or programming required. Besides reducing chip area and product cost, this plus other features of the core make the JPEG2K-E one of the easiest available in terms of system integration and software development effort.
The JPEGK2-E core was developed by CAST partner Alma Technologies (www.alma-tech.com). It will ship in the next quarter, in synthesizable RTL for ASICs or optimized netlists for Structured ASICs and FPGAs. Implementation results for the configurable and highly-scalable core vary greatly with application demands and user customization; see the web site for examples.
About CAST, Inc.
CAST provides over 100 popular and standards-based IP cores for ASICs and FPGAs. Privately owned and operating since 1993, CAST has established a reputation for high-quality IP products, simple licensing, and responsive technical support. The company is headquartered near New York City, partners with IP developers around the world, and works with select sales consultants and distributors throughout Europe and Asia.
|
CAST, Inc. Hot IP
Related News
- JPEG Encoder IP Core from CAST gets Rate Control Options, Faster FPGAs
- CAST JPEG 2000 Encoder Core Provides Fast, Flexible Image Compression
- Alma Technologies Announces Availability of a New Ultra-High Throughput JPEG 2000 Encoder IP Core
- Barco Silex releases Multi-Channel Ultra HDTV 8K JPEG 2000 encoder and decoder cores
- intoPIX announces new JPEG 2000 & security IP-cores optimized for the 28nm FPGAs
Breaking News
- Ceva-Waves Wi-Fi 6 IP Powers WUQI Microelectronics Wi-Fi/Bluetooth Combo Chip
- Accellera Board Approves Universal Verification Methodology for Mixed-Signal (UVM-MS) 1.0 Standard for Release
- Mirabilis Design Adds System-Level Modelling Support for Industry-Standard Arteris FlexNoC and Ncore Network-on-Chip IPs
- Rambus Reports Fourth Quarter and Fiscal Year 2024 Financial Results
- CoMira Solutions unveils its new 1.6T Ethernet UMAC IP
Most Popular
- Intel Halts Products, Slows Roadmap in Years-Long Turnaround
- UK Space Agency Awards EnSilica £10.38m for Satellite Broadband Terminal Chips
- CoMira Solutions unveils its new 1.6T Ethernet UMAC IP
- Eighteen New Semiconductor Fabs to Start Construction in 2025, SEMI Reports
- RISC-V in Space Workshop 2025 in Gothenburg
E-mail This Article | Printer-Friendly Page |