Synplicity's "Partners in Prototyping" takes the guesswork out of ASIC RTL prototyping

 
Press Contact:
Synplicity Inc.
Steve Gabriel
408/215-6000
steve@tsantes.com

 Reader Contact:
Tsantes & Associates
John Gallagher
408/369-1500 408/215-6000
johng@synplicity.com
 
 

SYNPLICITY'S "PARTNERS IN PROTOTYPING" PROGRAM TAKES THE GUESSWORK OUT OF ASIC RTL PROTOTYPING

Innovative Program Brings Together Leading Hardware, Software and Design Service Providers

SUNNYVALE, Calif., May 15, 2000 - Reinforcing its commitment to providing ASIC designers with complete RTL level prototyping solutions, Synplicity, Inc. today introduced its Partners in Prototyping (PIP) program. The new program brings together leading hardware, software and design service providers to offer a proven methodology for building FPGA-based prototype boards quickly and easily, further speeding the overall ASIC design and development cycle. Once these complementary solutions are proven to work with Synplicity's leading Certify? software tool, the documentation and technical information is then posted on a central Web site, allowing ASIC designers to visit a single destination for their prototyping needs.

"Until now, designers looking for a proven methodology for developing FPGA-based prototype boards for hardware and software verification, hardware debugging or in-circuit emulation had very few options and spent countless hours piecing together disparate hardware and software offerings," said John Gallagher, director of product marketing for Synplicity®. "By verifying a prototyping flow, which includes Certify and leading prototyping boards and tools, we're taking the guesswork out of prototype development. Bottom line, by taking care of the legwork we can save our customers valuable time, allowing them to focus on meeting their design specs and time-to-market demands."

Establishing an RTL Functional Prototyping Design Flow
Synplicity established the Partners in Prototyping program to identify and qualify a design methodology between Certify and complementary hardware, software and design services used in RTL functional prototyping. Incorporating RTL functional prototyping into the ASIC design flow offers designers substantial time to market advantages and enables early system software debugging. The availability of pre-defined, interoperable solutions reduces the risk of incorporating this FPGA-based prototyping methodology into an existing design flow.

 The six charter members of the Partners in Prototyping program include Wyle Design Services, Verplex Systems , The Dini Group, MicroFuzzy (Germany), Amirix Design Services (Canada) and Simpod. Each company has worked closely with Synplicity to verify interoperability between its own products and the Certify RTL prototyping tool in order to develop a smooth flow for ASIC designers, system designers and IP developers.

 Certify customers can take advantage of this joint development by visiting the Partners in Prototyping Web site to find information on the products and services available from the member companies. Designers can also use the site to quickly evaluate whether a standard board exists to meet their specific design requirements by downloading board descriptions (.vb files) from the site. Synplicity expects the PIP Web site will be active by the end of May 2000.

 Companies interested in joining the Partners in Prototyping effort can also visit Synplicity's Web site for more information.

 About Certify
Leveraging Synplicity's core synthesis and partitioning technologies, Certify allows designers to create functional hardware prototypes of their design prior to ASIC synthesis. This unique approach results in higher performance and productivity than gate-level partitioning approaches, which require multiple iterations to achieve a suitable partitioning of the devices, and enables faster time-to-market, especially for the one-million-gate-plus ASIC/SoC designs used for multimedia and communications applications.

Certify also enables extensive verification that previously could not be performed at the RT level without weeks of manual effort and modification of the RTL code. The creation of a functional hardware prototype at the RT level enables ASIC designers to perform the following tasks at or near system speed: hardware/software co-verification; algorithm development and verification; verification of intellectual property, either cores or library elements; system software development and debugging, verification of system-level protocol compatibility and early system/product development with FPGAs.

 About Synplicity
Founded in 1994, Synplicity Inc. delivers the benefits of logic synthesis and embedded synthesis technologies to programmable logic and ASIC designers by developing fast, easy-to-use, affordable tools with extremely high quality of results. Synplicity products support industry-standard design languages (VHDL and Verilog), run on popular platforms (Windows 95/98, Windows NT and UNIX) and support leading PLD manufacturers. Synplicity is a Platinum member of the Cadence Connections Program (NYSE: CDN), Synopsys Liberty Program (Nasdaq: SNPS), and other industry standards organizations. The company is located at 935 Stewart Drive, Sunnyvale, Calif. 94086. Telephone: 408/215-6000; Fax: 408/990-0290; E-Mail: info@synplicity.com.
 

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Synplicity is a registered trademark and Certify is a trademark of Synplicity, Inc. All other brands or products are the trademarks or registered trademarks of their owners.
 

Synplicity's Partners in Prototyping

Amirix Design Services, Richard Vallee, Director, Business Development
"AMIRIX[tm] Systems Inc. has worked with customers across several emulation and prototyping projects. We are excited to work with Synplicity to bring our expertise in FPGA/PLD, custom board, and embedded system design into an innovative tool like Certify."

 The Dini Group, Mike Dini, President
"The Dini Group's standard prototyping boards have been used with success by Certify customers around the world. Through the Partners in Prototyping program, Synplicity is once again demonstrating its commitment to delivering simply better results to ASIC designers overcoming the verification crisis."

 Microfuzzy, Markus Waidelich, Director Research & Development
"Microfuzzy has worked with leading German companies to deliver a modular, standard logic emulation capability which provides both high performance and small form factor. The support for our LOGES system with Certify means that customers can gain the advantages of in-circuit testing and high-speed functional verification directly at the RTL stage of ASIC design."

 Simpod, Charles Miller, vice president of sales
"Our DeskPOD product offers Certify customers a defined methodology for debugging the prototyping system, as well as accelerating hardware verification. With our experience in hardware modeling, hardware/software co-verification and complex ASIC debugging, we appreciate the advantages that a Certify-based RTL prototyping methodology offers ASIC designers."

 Verplex, Dino Caporossi, Verplex Director of Marketing
"Synplicity and Verplex both recognize the needs of ASIC designers to adopt methodologies which accelerate a 'right the first time' implementation of their designs. We intend to support Certify customers since Verplex specializes in verifying the highly optimized designs produced by these types of methodologies."

 Wyle Design Services, Tim Hurd, Intellectual Property Business Manager
"With our proven track record for providing design services to both ASIC and FPGA designers, Wyle is well positioned to assist customers in their RTL prototyping and intellectual property integration efforts. Synplicity's training of our field engineers on Certify, combined with our expertise with high performance programmable logic, means that a customer can integrate prototyping into their project schedule with confidence that they will be fully supported."
 

Steve Gabriel
Tsantes & Associates
1500 E. Hamilton Ave. Suite 200
Campbell, CA 95008
408/369-1500 x27
steve@tsantes.com
 

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