IMEC Sets New Record for 9bit, 50MSamples/s SAR ADC with a Figure of Merit of 65fJ
Leuven, Belgium -- September 19, 2007 -- A new ultra-low power (0.7 mW), high-speed (50MSamples/s) analog to digital converter, presented by IMEC earlier this year at the ISSCC conference, achieves a figure of merit of 65fJ per conversion step. This is 2.5 times better than the best ADC of this kind ever reported in research papers and an order of magnitude better than the best commercially available ADC IP blocks in 90nm CMOS.
The novel IMEC SAR ADC design is especially suited for nomadic applications in the IT realm. Its power scales linearly with the clock rate over a very wide range which makes it very well suited for software-defined radio applications. It is implemented in pure digital CMOS technology, making it very well suited for scaling to the 45nm CMOS node and below. The design is available as 'white box IP' for transfer to the industry.
The novel SAR ADC design is related to the world's first true software-defined radio front-end IC also presented by IMEC at ISSCC 2007. This front-end chip is widely programmable for all present and future standards between 174MHz and 6GHz. As low power consumption is of utmost importance for next-generation handheld and battery-powered devices, the new SAR ADC is a perfect match for future software-defined radio applications.
Instead of the active charge redistribution in the capacitor arrays of a conventional successive approximation (SAR) architecture, the low-power architecture of the new SAR ADC uses a passive charge-sharing concept to sample the input signal and to perform the successive-approximation cycling. As a consequence, the SAR operation is no longer based on voltage comparisons. It operates completely in the charge domain, which yields the record performance of the new IMEC design.
This way, the fundamental power limits of the original SAR architecture are overcome - by doing all the charge redistribution passively. The only active elements in the IMEC SAR ADC are the comparator and digital controller, so enabling ultra-low power consumption. Since the comparator doesn't consume any power during inactive mode, the power consumption of the ADC scales linearly with the sampling frequency. This helps maintaining the record figure of merit down to very low conversion rates.
The fully digital implementation of the ADC requires only MOS switches and metal-oxide-metal capacitors, making the ADC scalable towards the 45nm node and beyond.
The new IMEC SAR ADC outperforms all state-of-the art commercial ADCs by a factor of 10. It is 3.7 times better than ADCs in the same process generation (90 nm) and it is by a factor 2.5 better than any other high-speed research ADC.
Specifications:
- Technology: 90nm digital CMOS
- Resolution: 9 bit (scalable)
- Sample rate: 50Msamples/s
- Power consumption: 0.7mW
- Figure of Merit: 65fJ/conversion step
- INL and DNL: below 0.6 LSB
- ADC core size: 400x200µm2
Availability and URL
The SAR ADC intellectual property core is available for license today by contacting IMEC.The URL for this product is http://www.imec.be/ovinter/static_business/market.shtml
About IMEC
IMEC is a world-leading independent research center in nanoelectronics and nanotechnology. Its research focuses on the next generations of chips and systems, and on the enabling technologies for ambient intelligence. IMEC's research bridges the gap between fundamental research at universities and technology development in industry. Its unique balance of processing and system know-how, intellectual property portfolio, state-of-the-art infrastructure and its strong network of companies, universities and research institutes worldwide position IMEC as a key partner for shaping technologies for future systems.
IMEC is headquartered in Leuven, Belgium, has a sister company in the Netherlands, IMEC Nederland, concentrating on wireless autonomous transducer solutions, and has representatives in the US, China and Japan. Its staff of more than 1500 people includes more than 500 industrial residents and guest researchers. In 2006, its revenue (P&L) was EUR 227 million. Further information on IMEC can be found on www.imec.be.
|
Related News
- Imec and Holst Centre present ADC with record figure of merit suited for low energy radios
- Imec and Renesas Electronics report record ADC for next-generation high-bandwidth wireless receivers
- 16-Bit, 5MSPS SAR ADC IP Core Silicon-Proven: Delivers Superior Dynamic Performance with Flexible Resolution Modes for Next-Generation Applications
- Announcing Availability of Silicon-Proven 12bit 1Msps SAR ADC IP Core for Whitebox Licensing with Royalty Free
- Unveiling a Cutting-Edge 12-bit 5Msps SAR ADC IP Core - Industry-Leading Features, Silicon Proven, and Available for Licensing Now
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |