Mentor Graphics Launches FormalPro Equivalency Checker

WILSONVILLE, Ore., April 24 -- Mentor Graphics Corporation today introduced FormalPro(TM) equivalence checker, its next generation formal verification technology designed to overcome the challenges of verifying complex, multi-million gate system-on-chip (SoC) designs. The FormalPro tool offers designers the industry's highest capacity solution, an advanced debug environment and a level of automation that streamlines the verification process of the most complex SoC designs. This next generation technology allows for complete verification of million gate designs in minutes.

The migration to large SoC and ASIC designs along with the integration of internal and third party IP have created a simulation bottleneck that has contributed to the interest in formal methods for functional verification. The FormalPro tool's unmatched capacity, advanced automation and efficient debugging capabilities eliminate these bottlenecks and cut weeks out of the verification process to significantly reduce a design's time to market.

``Mentor Graphics® expressly designed FormalPro with the capacity to handle the current leading edge technologies and next generation SoCs quickly and easily,'' said Wally Rhines president and CEO, Mentor Graphics. ``A key component of Mentor's leading verification strategy, FormalPro is able to provide designers with a viable alternative to the traditional simulation and verification tools that have been unable to keep pace with the growing complexity of today's SoC and ASIC designs.''

Next Generation Formal Verification Technology

FormalPro uses an algorithmic-based approach, capable of reading VHDL and Verilog designs at the RTL and gate level, to prove functional equivalence between two designs throughout the entire design flow. FormalPro automates the verification process by performing matching, solving, and debugging to give users the essential process improvements to meet the inherent time to market pressures. The advanced debugging technology found in the FormalPro tool quickly performs automated analysis of failing comparison points and isolates the exact location of the error, increasing a design team's productivity and shortening turnaround times.

FormalPro's next generation technology is capable of executing multiple runs daily for multi-million gate designs without having to partition a SoC or ASIC design into blocks saving partitioning time and the risk of errors split across blocks. The tool's minimal setup requirements save designers time and allows the easy adoption of formal technology into any design flow. Multiple matching techniques, coupled with multiple solver technology, ensure an automated flow without the need of user intervention.

FormalPro Verifies Ericsson's Next Generation SoC Designs

Ericsson UAB in Sweden is designing switch processors for use in Ericsson's world-leading AXE switches. For its future SoC designs, Ericsson UAB has selected Mentor Graphics' FormalPro equivalence checker as one of their verification solutions.

``FormalPro's high capacity, performance, solvability, and ease of use made it a natural choice to address the verification challenges of our upcoming designs, while its debugging and automation technologies greatly simplify the verification process,'' said Barbara Remp, manager EDA/R&D at Ericsson UAB. ``Our current project is a million gate design with memory in the range of megabytes and we anticipate future design sizes to double by next year, thus a comprehensive formal verification solution has to be part of the verification flow.''

Formal Verification Market Soars

The need for viable verification solutions to handle the complex and the ever expanding SoC and ASIC designs has created a rapidly growing market. According to the latest Dataquest report, the formal verification market grew 75 percent to $22 million in 1998 and it is projected to reach between $70 and $90 million by 2002.

Price and Availability

FormalPro is currently available and is offered at U.S. list price of $110,000.

About Mentor Graphics:

Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products and consulting services for the world's largest electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of over $500 million and employs approximately 2,700 people worldwide. Company headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com .

NOTE: Mentor Graphics and FormalPro are registered trademarks or trademarks of Mentor Graphics Corporation. All other company and/or product names are the trademarks and/or registered trademarks of their respective owners.

CONTACT: Patti Atkins of Mentor Graphics Corporation, 503-685-1165, or atkins@mentor.com; or Luis Lorenzana of Benjamin Group/BSMG Worldwide, 415-352-2628, ext. 617, or luis_lorenzana@benjamingroup.com, for Mentor Graphics Corporation.