TSMC offers engineering collaboration over the Internet
TSMC offers engineering collaboration over the Internet
By Semiconductor Business News
April 24, 2000 (9:18 a.m. EST)
URL: http://www.eetimes.com/story/OEG20000424S0005
HSINCHU, Taiwan -- Taiwan Semiconductor Manufacturing Co. here today launched an Internet-based engineering service that allows geographically dispersed designers to collaborate with TSMC engineers in real time. TSMC's Internet Layout Viewer enables teams of designers to review all or part of the chip layout over the World Wide Web. "By leveraging the Internet as the platform for value-added, collaborative engineering services, we hope to increase the accuracy and speed of engineering communications that results in right-the-first-time silicon," said Quincy Lin, senior vice president of corporate development. TSMC developed the Internet Layout Viewer with CreOsys Inc., a Fremont, Calif.-based business-to-business c-commerce systems developer. TSMC plans to add new offerings as well as those from third-party vendors that will enable full front-to-back design collaboration over the Internet, targeted to TSMC's processes. The Internet Lay out Viewer is platform independent, requiring only a web browser rated at 4.0 or above. The platform can be a PC, Apple Macintosh or a workstation running Windows, Mac OS, UNIX or Linux. The Internet Layout Viewer is based on three new developments from CreOsys. The first, CreOx, is an application within the CreOweb system that enables real-time desktop application sharing through the Internet. Next, GdsCruiser and SiliconCruiser, are both Web-based layout applications that allow designers to easily view their physical designs at any stage of development. All three applications include a conference feature that allows instantaneous multi-party viewing and discussion of the layout design. The Layout Viewer is a secure system that does not allow users to download or otherwise capture the design. The actual database on which the design resides never leaves the corporate firewall. Instead, engineers can simultaneously view part or all of a given design, isolate and mark individual circuits or lines , trace circuits, and provide comments for all to see. This highly interactive, real-time layout viewing capability should significantly shorten layout review time while ensuring that the design's functionality was laid out accurately and efficiently. "The ability for a designer to simply go to the Web, traverse the layout and manipulate the design in real time -- with the guidance of a TSMC engineer -- is fundamentally revolutionary," said Ping Yang, vice president of design services at TSMC. "Because the original designers of the product may have a sensitivity to timing, noise or power related design issues, they generally will want to see the layout before going to silicon. The Internet Layout Viewer allows these designers to provide quick, accurate approval for the design in real time, instead of paying an expensivepersonal visit to have face-to-face meetings." TSMC's Internet Layout Viewer is available now for free to TSMC customers with service contracts through TSMC's Design Service Division.
Related News
- TSMC and Cadence Collaborate to Deliver AI-Driven Advanced-Node Design Flows, Silicon-Proven IP and 3D-IC Solutions
- Siemens extends collaboration with TSMC to advance integrated circuit and systems design
- CoreHW and Presto Engineering Announce Ground-breaking Collaboration to Advance Global Penetration of Ultra-low-power RF IoT Devices
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Socionext Announces Collaboration with Arm and TSMC on 2nm Multi-Core Leading CPU Chiplet Development
Breaking News
- Baya Systems Raises $36M+ to Propel AI and Chiplet Innovation
- Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional Safety
- VeriSilicon and Innobase collaboratively launched second-generation Yunbao series 5G RedCap/4G LTE dual-mode modem IP
- ARM boost in $100bn Stargate data centre project
- MediaTek Adopts AI-Driven Cadence Virtuoso Studio and Spectre Simulation on NVIDIA Accelerated Computing Platform for 2nm Designs
Most Popular
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
- Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
E-mail This Article | Printer-Friendly Page |