Evatronix announces NANDFlash-CTRL3 Controller for SoC Designs
Update: Cadence Completes Acquisition of Evatronix IP Business (Jun 13, 2013)
NANDFlash-CTRL3 Controller IP provides designers with a fast and efficient arrangement of SLC and MLC Large Block NAND Flash Memory.
Gliwice & Bielsko-Biala, Poland -- October 31st,2007 -- The silicon Intellectual Property (IP) provider, Evatronix SA, announced today a NANDFLASH-CTRL3 Controller IP for NAND Flash memories. This solution provides System-on-Chip developers with a comprehensive way to take advantage of high-capacity Multi-Level Cell (MLC) architecture while still supporting traditional Single-Level Cell (SLC) one.
NANDFLASH-CTRL3 is addressed to designers who develop systems that make use of Flash memories, either in general purpose mass storage devices or for instance in multimedia applications like cameras & photo albums, video and audio streaming, mostly in mobile equipment.
The third generation of this core extends the list of features proven in previous controllers. Comprehensive command set for easy NAND Flash memory access makes the controller’s usage straightforward while an efficient error correction mechanism and automatic remapping of corrupted memory blocks increase NAND Flash memory reliability.
New features include support for MLC memories and 4KB page size, as well as over 64Gb of total capacity and a new multiple bit Error Correction Code (ECC)
Evatronix core supports the ONFI standard and can be integrated with SoC architectures based on a bus compliant to AMBA AHB specification. Usefulness of the controller for embedded applications is further enhanced by ability to boot software directly from Flash memory and a power save mechanism.
“We observe that electronic devices are migrating to higher-capacity MLC and SLC NAND Flash memories, therefore our customers expect a better system-level solution for these memory types,” said Wojciech Sakowski, Evatronix co-President. “NANDFLASH-CTRL3 features and enhancements are our answer to market expectations, especially the support for over 64Gb memories that are yet to be released and an Error Correction Code using multiple bit error correction algorithms (BCH family). We will soon launch an OCP-compliant version to provide our customers with even more flexibility during integration of our product into their systems.“
As an addition, Evatronix design team developed a NAND Flash controller driver, which allows users to develop their software without detailed knowledge of the NAND Flash controller hardware. A complete set of driver functions was tested in eCos and Windows CE environments.
Availability and customization possibilities
NANDFLASH-CTRL3 core and the accompanying driver will be available for licensing in late November, whereas a version equipped with an OCP socket will be released in Q1 2008. Evatronix design team is ready to assist customers in adapting the controller to a particular on chip bus architecture or extending controller’s features according to evolving ONFI standard.
A demo application that presents the use of NANDFLASH-CTRL3 and the accompanying driver together with a block device emulator controlled by FAT32 file system running under the eCos real time OS, is available upon request.
About Evatronix
Evatronix SA, headquartered in Bielsko-Biala, Poland, founded in 1991 develops electronic virtual components (IP cores) along with complementary software and supporting development environments. The company also provides electronic design services. Its main design office location, Gliwice (Poland), guarantees easy access to the pool of talented graduates from the Silesian University of Technology. Evatronix IP cores are available worldwide through the sales channels of its strategic distribution partner CAST, Inc. (New Jersey, USA). In the EU countries (excluding UK) and in Switzerland Evatronix operates a direct sales channel. Design services are offered directly by Evatronix world wide. To find out more information on the company and its product portfolio visit the company’s web site at http://www.evatronix.pl.
|
Related News
- PLDA Announces XpressRICH PCI Express 6.0 Controller IP for Next Generation SoC Designs
- MIPI CSI 3, DSI 2 Tx & Rx Advanced Controller & PHY IP Cores available in major Fabs & Nodes for SOC Designs for Imaging and Display Applications
- Arasan Chip Systems expands its storage IP Portfolio with ONFI 4.1 PHY and I/O PAD IP seamlessly integrated with its NAND Flash Controller IP for UMC 28nm SoC Designs
- Lucent Technologies Licenses Palmchip's QuickConfig Memory Controller for SOC Designs
- Mobiveil's PSRAM Controller IP Lets SoC Designers fully Leverage AP Memory's Ultra High Speed (UHS) PSRAM Memory
Breaking News
- Logic Design Solutions launches Gen4 NVMe host IP
- ULYSS1, Microcontroller (MCU) for Automotive market, designed by Cortus is available
- M31 is partnering with Taiwan Cooperative Bank to launch an Employee Stock Ownership Trust to strengthen talent retention
- Sondrel announces CEO transition to lead next phase of growth
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
Most Popular
- Arm's power play will backfire
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PUFsecurity Collaborate with Arm on PSA Certified RoT Component Level 3 Certification for its Crypto Coprocessor to Provide Robust Security Subsystem Essential for the AIoT era
E-mail This Article | Printer-Friendly Page |