Mixel Announces Tape-out of the First Complete MIPI D-PHY IP for Mobile Applications
SAN JOSE, Calif. -- November 05, 2007 -- Mixel Inc. today announced availability of the MXL-PHY-MIPI, a MIPI (Mobile Industry Peripheral Interface) standard D-PHY virtual component Intellectual Property (IP). The IP is a MIPI standard revision 0.90 compliant D-PHY allowing bidirectional transfer of video and control data between the host processor and display or camera module. The MXL-PHY-MIPI includes both the Analog and Digital D-PHY blocks. The IP is designed in Taiwan Semiconductor Manufacturing Company Ltd and Chartered Semiconductor Manufacturing Ltd 0.13um LP digital CMOS process technologies.
“Mixel continues to be first-to-market with advanced IP solutions for mobile applications, building on the leadership position we established with our MDDI IP,” said Ashraf Takla, Mixel President and CEO. “The new D-PHY is a fully compliant MIPI IP supporting 1Gbps operation at low power and small footprint. The complete D-PHY solution provides a seamless interface to MIPI DSI or CSI controller with multiple data-channel capability,” he added.
The MXL-PHY-MIPI is a point-to-point differential interface supporting a clock and multiple data lanes. The scalable data lanes support both bidirectional and unidirectional modes. The High Speed mode offers up to 1Gbps data transfer per lane while the Low Power mode offers reduced power consumption. The IP can be used in master/slave configuration and offers optional half-duplex operation.
The MXL-PHY-MIPI is offered for TSMC and Chartered 0.13um LP process technology and will later be offered for other process nodes and foundries.
About Mixel
Mixel is a leading provider of silicon-proven mixed-signal IP cores. Mixel provides its customers and partners with outstanding mixed-signal IP cores, creating in the process a differentiating technology that helps set their products apart. Mixel’s mixed-signal IP portfolio includes SerDes (compatible with PCI Express, SATA, XAUI, Fibre Channel, GPON), Transceivers (LVDS, MIPI, MDDI, DDR2, PCI-X, SSTL, HSTS, CE-ATA, CardBus, Parallel ATA), PLL, DLL, ADC, DAC, Low-voltage detectors and low-voltage BGR references. For more information please go to www.mixel.com or call Mixel marketing at 408-942-9300 X 140.
|
Mixel, Inc. Hot IP
Related News
- Faraday Adds Video Interface IP to Support All Advanced Planar Nodes on UMC Platform
- Mixel Announces Immediate Availability of MIPI C-PHY/D-PHY Combo IP on STMicroelectronics 40LP Process Technology
- M31 demonstrates high-speed interface IP development achievements on TSMC's 7nm & 5nm process technologies
- Mixel MIPI C-PHY/D-PHY Combo IP Integrated into Hercules Microelectronics HME-H3 FPGA
- Mixel MIPI D-PHY IP Integrated into Teledyne e2v's new Topaz CMOS Image Sensors
Breaking News
- intoPIX Powers Ikegami's New IPX-100 with JPEG XS for Seamless & Low-Latency IP Production
- Tower Semiconductor and Alcyon Photonics Announce Collaboration to Accelerate Integrated Photonics Innovation
- Qualcomm initiates global anti-trust complaint about Arm
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- SiliconIntervention Announces Availability of Silicon Based Fractal-D Audio Amplifier Evaluation Board
Most Popular
- Qualcomm initiates global anti-trust complaint about Arm
- Siemens acquires Altair to create most complete AI-powered portfolio of industrial software
- Alphawave Semi Reveals Suite of Optoelectronics Silicon Products addressing Hyperscaler Datacenter and AI Interconnect Market
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- Rapidus Announces Strategic Partnership with Quest Global to Enable Advanced 2nm Solutions for the AI Chip Era
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |