ARM, Improv to optimize DSP core for on-chip bus, create co-simulation system
![]() |
ARM, Improv to optimize DSP core for on-chip bus, create co-simulation system
By Semiconductor Business News
December 10, 2001 (4:21 p.m. EST)
URL: http://www.eetimes.com/story/OEG20011210S0063
CAMBRIDGE, England -- ARM Ltd. and Improv Systems Inc. today announced plans to collaborate in development of a configurable digital signal processor (DSP) core, which will be available for licensing and optimized for use on ARM's AMBA Multi-layer AHB on-chip interconnect bus. The project will allow system-on-chip developers to quickly link Improv's Jazz DSP technology with ARM's RISC microprocessors, said the two companies, which are extending their collaboration. A co-simulation system is also being developed to allow developers to verify hardware and software working together on an integrated platform. ARM here and Improv in Beverly, Mass., had earlier cooperated in creating the AHB specification and a reference platform for voice-over-packet designs. The Multi-layer AHB is a key advancement in the capabilities of AMBA interconnect, providing a solution that reduces latencies and increases the bus bandwidth available to multi-master syst ems, said officials with the two companies. "Improv and ARM have already demonstrated the benefits of combining our technologies on an SoC platform," said Cary Ussery, president and CEO of the Massachusetts company. "This integration will provide designers an even more efficient and flexible way to leverage our configurable methodology into AMBA interconnect-based designs." The work on a joint-verification environment will link the ARM and Improv simulation and debugging capabilities. Verifying actual software on the hardware design prior to prototype will increase the confidence that the system will operate as expected when manufactured, said the two companies. The AMBA Multi-layer AHB support and co-verification environment will be available from Improv during the first half of 2002.
Related News
- Improv Jazzes up DSP core for ARM on-chip bus
- ARM System IP boosts SoC performance from edge to cloud
- TEMENTO SYSTEMS announces the introduction of a Bus Trace Analyzer for On-Chip AMBA and ARM processor-based Verification
- ParthusCeva and ARM Collaborate to Create Common Development Environment for Hybrid CPU/DSP-Based System-on-Chip
- Xilinx and EV Engineering deliver MHz co-simulation with Virtex-II technology
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |