ARC configures a design flow for system-on-chip
(12/12/2007 3:37 AM EST)
SANTA CLARA, California — Configurable cores and subsystems developer ARC International (St. Albans, England) has developed and is refining a systems development platform that it says will change the way mobile multimedia systems are being designed.
Elements of the platform were described by technologists from ARC at its ConfigCon development conference held here last week, where the company also announced an initiative that offers startups up to $1 million in seed funding. The initiative is in collaboration with some venture capital groups and is targeted at companies developing multimedia applications using ARC tools or IP cores.
"I have already been approached here today by three people who want to apply, and we expect many more. And I would be really pleased if we end up supporting two really good ideas maybe even just one outstanding one," said Carl Schlachte, ARC president and CEO.
Also at the developers' conference, Jeff Hoffman, systems architect at Intel Corps communications laboratory, gave further details of an experimental chip being developed for a PHY chip that would "enable any mobile internet device to connect to any network." The test SoC, based on an ARC 605+ core, initially supports 802.11n WiFi, mobile WiMax and the DVB-H flavor of mobile TV and is being taped out on a TSMC low-power 65-nm process.
"It is not quite the holy grail of wireless connectivity, but we believe it is getting near the vision needed for devising next generation radios for wireless," Hoffman told EE Times.
E-mail This Article | Printer-Friendly Page |
|
Related News
- SpringSoft's Siloti System Simplifies Visibility Automation and Debug Flow for System-on-Chip Verification
- ARC and Global Unichip Partner to Speed Digital Audio System-on-Chip Designs For Greater China's Semiconductor Industry
- ARC's Configurable Cores Again Chosen By Conexant for Next-Generation System-on-Chip Design
- Cadence Perspec System Verifier Delivers Up to 10X Productivity Improvement in System-on-Chip Verification
- Newport Media Unveils World's First 65nm System-on-Chip (SoC) for Japan/Brazilian ISDB-T Mobile TV
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models