7 µW always on Audio feature extraction with filter banks on TSMC 22nm uLL
TPACK Introduces SOFTSILICON a Standard Chip with Built-in flexibility Ideal for Packet Transport Applications
Copenhagen -- Jan 28 2008 -- TPACK today announced the introduction of SOFTSILICON, a concept for development of standard Telecom chip solutions with built-in flexibility. By using SOFTSILICON solutions, Telecom Equipment Manufacturers can not only accelerate system development, but can also introduce critical, competitive features and accommodate the continuous introduction of new standards, technologies and customer demands.
SOFTSILICON is provided as a standard chip solution similar to Application Specific Standard Products (ASSPs) with a comprehensive feature list targeting a specific application, such as Carrier Class packet switching and traffic management or packet mapping. However, since SOFTSILICON is based on off-the-shelf programmable chips, specifically Field Programmable Gate Arrays (FPGAs), the features and interfaces can be changed to fit Telecom Equipment Manufacturers’ needs for differentiation both under development and once the system has been deployed.
“SOFTSILICON is coming at the right time for packet transport applications”, said Michael Howard, Principal Analyst & Co-Founder at Infonetics Research. “Many new technologies, concepts, and architectures must be supported now and undoubtedly more in the future. It is difficult to say at this time which will win, but it is certain that there is a real opportunity here for telecom equipment manufacturers that can react quickly and adapt fast to the dynamics of this market.”
“Telecom Equipment Manufacturers have realized that ASIC, and even ASSP based system development does not provide them with the flexibility that they need to accommodate new requirements, such as hardware based OAM and fast protection switching. NPUs and FPGAs are increasingly being used to introduce this flexibility, but require in-house expertise and time to program. By utilizing SOFTSILICON products, Telecom Equipment Manufacturers can have the best of both worlds – an ASSP-like standard product to get their system development off to a flying start, but also the flexibility to accommodate adaptations, customizations and future requirements,” said Peter Viereck, CEO TPACK.
TPACK’s SMARTPACK line of SOFTSILICON products targets Packet Transport applications supporting packet switching, traffic management and packet mapping of Ethernet, IP/MPLS, VPLS/PWE3, PBB-TE/PBT and T-MPLS packet data over fibre, PDH, SONET/SDH and WDM/OTN. With well over 100 design-ins with 8 of the top 10 optical telecom equipment manufacturers, TPACK’s SOFTSILICON solutions have a proven track record in supporting high performance, flexible system applications.
To learn more about the SOFTSILICON concept, see TPACK’s new whitepaper at: SOFTSILICON for Flexible Packet Transport White Paper
For more information on TPACK SMARTPACK products see: TPACK SMARTPACK Products
|
Related News
- NEC Electronics Introduces Cost-Effective EMMA SoCs with Built-In Support for Next-Generation H.264 Video Compression Standard
- GOWIN Semiconductor Introduces Their latest FPGA Product Line with Built-In Security
- Atmel Introduces a Re-programmable Rad-hard FPGA with Built-in Single Event Upset (SEU) Protection for Space Applications
- Training firm offers free Vera TCP/IP packet generator with a built-in functional coverage tracker
- Genesys Testware introduces built-in diagnosis and repair solution for embedded memories with repair circuitry
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |