English
Aldec Releases Riviera-PRO(TM) 2008.02 with VHDL 2007, SystemC 2.2 and SystemVerilog (DPI)
HENDERSON, Nev.-- February 25, 2008 --Aldec, Inc. announced today the release of Riviera-PRO 2008.02, a mixed language HDL simulator that now includes VHDL 2007, integrated SystemC 2.2 compiler and SystemVerilog DPI support. Riviera-PRO offers mixed language verification support for VHDL, Verilog®, SystemVerilog and SystemC for behavioral, structural and timing simulation of multi-million gate ASIC and FPGA designs.
VHDL 2007 Support
Riviera-PRO 2008.02 supports many features of the VHDL standard draft (IEEE P1076-2007/D4.0), recently approved by Accellera. Constructs such as new data types, subprograms and operators, matching case statement, signal expressions in port maps and delimited comments are just some of the latest enhancements. The addition of these new VHDL constructs makes Riviera-PRO one the most advanced mixed language VHDL simulators on the market.
SystemC 2.2
Riviera-PRO fully integrates the OSCI SystemC 2.2 compiler – the first version compliant with the IEEE Std 1666-2005 standard. The integrated debugging environment allows system level designers to run mixed simulation based on SystemC and HDL code from a common design environment. Code stepping and all break points, independent of SystemC/C++ or HDL, can be used to debug large SOC designs on Linux 32 and 64 bit platforms.
Additional New Capabilities
SystemVerilog DPI and classes support has been enhanced and the Denali® Memory Model interface now supports dedicated control commands in the console and simulation scripts from both VHDL and Verilog. The OVL library support has been upgraded to 2.1 and significant speed and compression improvements have been made to Aldec’s waveform viewer to provide more efficient debugging of large multi-million gate ASIC designs.
About Riviera-PRO
Riviera-PRO is a common-kernel, mixed language, multi-platform simulator for Verilog, SystemVerilog, VHDL, SystemC, C/C++, Assertions and EDIF. Riviera-PRO works in command line mode for maximum speed or in state-of-the-art GUI for enhanced editing, tracing, and debugging capabilities, including code coverage and linting. Riviera-PRO is compatible with industry standards and interfaces with popular EDA products such as Synopsys® SmartModels™, LMTV™, Novas™, Denali®, MATLAB®, and Simulink®.
Riviera-PRO 2008.02 is available in three configurations; all licenses are floating and support UNIX®, Windows® and Linux® 32/64. Additional information about Riviera-PRO configurations is available at http://www.aldec.com/products/riviera/configurations/.
Availability
Riviera-PRO 2008.02 is available today and is sold directly from Aldec and its authorized worldwide distributors. For a FREE evaluation copy of Riviera-PRO 2008.02, please visit http://www.aldec.com/products/riviera.
Aldec Website
www.aldec.com
About Aldec
Aldec, Inc., established in 1984, is committed to delivering best value-in-class products to government, military, aerospace, telecommunications, automotive and industrial customers. Aldec offers a patented technology suite of robust EDA verification products including: design entry, software simulators, co-simulation, linting software, prototyping, hardware accelerators, hardware emulators, co-verification solutions, IP Cores, DO-254 compliance solutions and engineering services. Continuous innovation, superior product quality and total commitment to customer service comprise the foundation of Aldec’s corporate mission.
VHDL 2007 Support
Riviera-PRO 2008.02 supports many features of the VHDL standard draft (IEEE P1076-2007/D4.0), recently approved by Accellera. Constructs such as new data types, subprograms and operators, matching case statement, signal expressions in port maps and delimited comments are just some of the latest enhancements. The addition of these new VHDL constructs makes Riviera-PRO one the most advanced mixed language VHDL simulators on the market.
SystemC 2.2
Riviera-PRO fully integrates the OSCI SystemC 2.2 compiler – the first version compliant with the IEEE Std 1666-2005 standard. The integrated debugging environment allows system level designers to run mixed simulation based on SystemC and HDL code from a common design environment. Code stepping and all break points, independent of SystemC/C++ or HDL, can be used to debug large SOC designs on Linux 32 and 64 bit platforms.
Additional New Capabilities
SystemVerilog DPI and classes support has been enhanced and the Denali® Memory Model interface now supports dedicated control commands in the console and simulation scripts from both VHDL and Verilog. The OVL library support has been upgraded to 2.1 and significant speed and compression improvements have been made to Aldec’s waveform viewer to provide more efficient debugging of large multi-million gate ASIC designs.
About Riviera-PRO
Riviera-PRO is a common-kernel, mixed language, multi-platform simulator for Verilog, SystemVerilog, VHDL, SystemC, C/C++, Assertions and EDIF. Riviera-PRO works in command line mode for maximum speed or in state-of-the-art GUI for enhanced editing, tracing, and debugging capabilities, including code coverage and linting. Riviera-PRO is compatible with industry standards and interfaces with popular EDA products such as Synopsys® SmartModels™, LMTV™, Novas™, Denali®, MATLAB®, and Simulink®.
Riviera-PRO 2008.02 is available in three configurations; all licenses are floating and support UNIX®, Windows® and Linux® 32/64. Additional information about Riviera-PRO configurations is available at http://www.aldec.com/products/riviera/configurations/.
Availability
Riviera-PRO 2008.02 is available today and is sold directly from Aldec and its authorized worldwide distributors. For a FREE evaluation copy of Riviera-PRO 2008.02, please visit http://www.aldec.com/products/riviera.
Aldec Website
www.aldec.com
About Aldec
Aldec, Inc., established in 1984, is committed to delivering best value-in-class products to government, military, aerospace, telecommunications, automotive and industrial customers. Aldec offers a patented technology suite of robust EDA verification products including: design entry, software simulators, co-simulation, linting software, prototyping, hardware accelerators, hardware emulators, co-verification solutions, IP Cores, DO-254 compliance solutions and engineering services. Continuous innovation, superior product quality and total commitment to customer service comprise the foundation of Aldec’s corporate mission.
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