Adaptive Clock Generation Module for DVFS and Droop Response
OCP-IP Unveils CoreCreator II
CoreCreator II allows users to verify, debug, and analyze OCP Cores and OCP-based Systems. It is comprised of two fundamental component parts: first, Synopsys DesignWare® verification IP provides OCP master and slave transactors that generate and respond to all types of OCP 2.2 transactions, and a simulation monitor that provides coverage reports of the functional coverage groups defined in the Protocol Compliance section of the OCP Specification. Second, Sonics’ performance analyzer (ocpperf2) and disassembler (ocpdis2) measure interface performance and help view the behavior of the OCP traffic. Both component parts are configurable to support the wide range of OCP 2.2 interface options.
The new version is compatible with traditional Verilog and VHDL testbench environments to create directed tests for OCP designs. Synopsys DesignWare verification IP within CoreCreator II adds support for advanced verification methodologies as described in the Verification Methodology Manual for SystemVerilog to enable its use in constrained-random verification environments.
CoreCreator II includes support for the existing CoreCreator BFM Verilog task interface allowing members to transition testbenches to the new verification IP with minimal changes to their testbench code.
OCP-IP members receive free training and support, software tools, including CoreCreator, enabling them to focus on the challenges of SoC design. Leveraging OCP-IP’s infrastructure eliminates the need to internally design, document, train and evolve a proprietary standard and accompanying support tools, freeing up critical resources for the real design work, while providing enormous cost savings.
Availability
Members can now request copies of CoreCreator II as part of the benefits of their membership agreement by visiting the OCP-IP website at www.ocpip.org.
About OCP-IP
The OCP International Partnership Association, Inc. (OCP-IP), formed in 2001, promotes and supports the Open Core Protocol (OCP) as the complete socket standard ensuring rapid creation and integration of interoperable virtual components. OCP-IP's Governing Steering Committee participants include: Nokia (NYSE:NOK), Sonics Inc., Synopsys [SNPS], Texas Instruments (NYSE:TXN), and Toshiba Semiconductor Group (including Toshiba America TAEC). OCP-IP is a non-profit corporation delivering the first fully supported, openly licensed, core-centric protocol comprehensively fulfilling system-level integration requirements. The OCP facilitates IP core reusability and reduces design time, risk, and manufacturing costs for SoC designs. For additional background and membership information, visit www.ocpip.org.
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