Intellectual-property issues stall SoC designs
Intellectual-property issues stall SoC designs
By Robert Ristelhueber, EE Times
March 7, 2000 (5:40 p.m. EST)
URL: http://www.eetimes.com/story/OEG20000307S0037
PHOENIX The lack of reusable intellectual property (IP) will continue to daunt the drive for system-on-a-chip (SoC) designs for the foreseeable future, and both technical and business challenges must still be overcome, according to a panel held Monday (March 6) at the Semico Research Summit conference. "There really isn't a problem with available IP. Lots of it has been generated for decades," said Walden Rhines, president and chief executive officer of Mentor Graphics Corp. "The problem is reusable IP you can actually support in a design team where you don't have the original developer." Complicating the challenge of getting that IP to work is the fact that most of it was developed by teams that had little knowledge of the work of other IP developers, which complicates the integration process. "People spent their whole careers not only in memory design, but as EPROM or static RAM designers," Rhines said. "The DRAM designers didn't talk to the SRAM designers, the hardware developers didn't talk to the software developers, and the memory designers didn't talk to the logic designers." "A lot of the IP being offered is no good," said John Daane, executive vice president of LSI Logic Corp. "You can get a 32-bit microprocessor on the Web and it might have some value, but who guarantees it works under all conditions? The industry has burned itself because a lot of small companies developed IP but they had no money to verify it. A lot of Ethernet functions were not industry compliant." As a result, most IP users now want a brand name like ARM or MIPS before they'll use a design, he said. "When you're dealing with a small company, then you need long-term support. That's one reason why the EDA industry got into business of supporting that," said Aart de Geus, chairman and chief executive officer of Synopsys Inc. But de Geus agreed that SoC designers should give up hope of reusing much of the existing IP. "We need a dose of reality," he s aid. "You can waste an enormous amount of time, especially with analog . . . Do you want the old bugs with it? A new design is often more effective," de Geus said. "The idea of system-on-a-chip is very real," said LSI's Daane. "What is not happening is a plethora of IP over the Internet for free. One of the fundamental barriers is that companies don't want to give up patent protection." For example, getting Texas Instruments Inc. to widely disseminate its digital signal processor "is just not going to happen. They don't want to share that franchise." That's one reason LSI Logic has invested a lot in its own IP development, Daane said. "We have well over 100 analog engineers. It really is required, since nearly every [SoC] design today has analog in it." By starting from scratch using its own methodology, LSI makes design reuse easier, Daane said. LSI does license some cores, such as MIPS and ARM processors, but chooses to develop most of its own IP, he said. For that reason, he doubts many IP pr oviders will survive. "Developing IP is very expensive," Daane said. "A lot of small companies can't do it. I don't think that's a sustaining business." Search words: Semico, intellectual property, system-on-a-chip
Related News
- True Circuits Features New Line of 65nm PLL & DLL Intellectual Property for ASIC, FPGA and SoC Designs at Chartered Technology Forum 2006 - USA
- True Circuits Attends Design Automation Conference, Features Complete Line of PLL and DLL Intellectual Property for ASIC, FPGA and SoC Designs
- Startup to sell DSP intellectual-property cores
- Intel ASIC unit to focus on comms chips and is building a network of third-party intellectual-property suppliers to support the effort
- Entropic Communications Selected to Acquire Trident Set-Top Box System-on-a-Chip Assets and Intellectual Property
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |