Seven Million Gate Design Emulated in-circuit
SEVEN MILLION GATE DESIGN EMULATED IN-CIRCUIT
Block-based Verification Methodology Being Used to Verify Satellite Design
SAN JOSE, Calif. - March 6, 2000 - Aptix Corporation today announced that one of its customers is emulating a design totaling seven million gates in complexity. The design has been implemented in several System Explorer[tm] MP4 systems using Xilinx FPGAs. The in-circuit speed of the emulated design is over 6 MHz.
According to Amr Mohsen, president and chief executive officer of Aptix, "We believe the design is among the largest ever to be emulated in-circuit. This particular design is of a complete, multiple-chip system for a satellite communications application. Our customers like the Aptix system block-based verification methodology because it allows them to integrate all their IP and embedded software months earlier than traditional development processes allow typically shaving months off of development schedules."
About Aptix Corporation
Aptix Corporation's products are used to verify system and system-on-chip (SOC) designs prior to integrated circuit (IC) and board tape-out and fabrication. Aptix's products utilize the block-based verification methodology, which provides a mechanism to map and verify individual design blocks incrementally and in parallel with the design creation process. This methodology shortens the net prototype creation time of achieving real-world operation of the prototype to the few days required to map and verify the last RTL block designed. Debugging designs becomes simple because the mapping process is both under the user's interactive control and follows the natural hierarchy of the design. This also makes the tracing of design problems back to the source netlist an intuitive process.
The company is privately held and is headquartered at 2880 North First Street, San Jose, California 95134. Telephone (408) 428-6200, Fax (408) 944-0646. Visit Aptix on the Web at http://www.aptix.com.
###
System Explorer is a trademark of Aptix Corporation.
For More Information Contact:
Linda Lavin (Aptix Corporation) (408) 428-6226
LeAnne Frank (KVO-Public Relations Counsel) (503) 221-7403
Related News
- ARM Announces Updated Version of In-Circuit Emulator
- S2C Announces 300 Million Gate Prototyping System with Intel Stratix 10 GX 10M FPGAs
- Breker Verification Systems Unifies SoC Verification Across Simulation, Acceleration, In-Circuit Emulation, FPGA Prototyping, Silicon Validation
- Faraday and UMC Deliver 300 Million Gate 40nm Customer SoC
- VeriSilicon Holdings Co., Ltd. Secures $20 Million in Financing
Breaking News
- Micon Global and Silvaco Announce New Partnership
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
Most Popular
E-mail This Article | Printer-Friendly Page |