PCI-SIG Completes I/O Virtualization Suite of Specifications
New Technology Removes Performance Bottlenecks and Enables More Opportunities to Optimize Power Savings
BEAVERTON, Ore. -- June 10, 2008 -- PCI-SIG®, the Special Interest Group responsible for PCI Express® (PCIe®) industry-standard I/O technology, today announced the completion of the PCI-SIG I/O Virtualization (IOV) suite of specifications. These specifications will enable virtualization solutions to tackle the most I/O-intensive workloads by removing performance bottlenecks in both software and hardware virtualization components. With the completion of the IOV suite, PCI-SIG offers the industry a robust set of technologies to complement work done by member companies in creating next-generation processors, chipsets and I/O fabrics.
“The completion of the IOV specification suite fulfills a commitment made by the PCI-SIG to provide its members with a full suite of IO technologies targeted at improving virtualization performance,” said Al Yanes, PCI-SIG chairman and president. “These specifications, in conjunction with system virtualization technologies, build on the PCIe protocol stack. PCI-SIG continuously works to evolve technologies as the industry grows and changes – to offer the most current, relevant technology to innovative developers.”
Virtualization benefits customers by enabling OS and application consolidation, reducing application downtime for repair or maintenance, and reducing the power and thermal footprint as a result. This can lead to significant aggregate cost reductions in the enterprise, and across the entire range of application usage models including clients, embedded, and telecom market segments. By eliminating software and hardware performance bottlenecks, the PCI-SIG IOV technologies enable greater consolidation, more opportunities to optimize power savings, and greater cost savings.
“As the last element within the IOV suite, the Multi-Root IOV specification allows I/O devices to be shared between multiple processing elements such as server blades, telecom processors, and embedded processors which can reduce the amount of hardware provisioned without compromising performance or QoS,” explained Michael Krause, PCI-SIG IOV workgroup co-chairman.
These IOV specifications define a standardized configuration, error handling, and QoS controls, which:
-
Enable faster time-to-market
-
Lower software and hardware development costs
-
Lower validation and tool chain costs
The three specifications comprising the suite are Address Translation Services (ATS), Single-Root IOV (SR-IOV), and Multi-Root IOV (MR-IOV).
-
ATS (released March 2007) enables performance optimizations between an I/O device and the platform’s input/output memory management unit (IOMMU). By using translated addresses, cache pressures can be reduced on the IOMMU, in turn, reducing memory bus consumption and leading to optimal performance.
-
SR-IOV (released October 2007) enables multiple guest operating systems to simultaneously access an I/O device without having to trap to the hypervisor on the main data path. Direct hardware access can significantly improve system performance, reduce system power consumption, and lead to greater cost savings.
-
MR-IOV (released May 2008) enables either PCIe or SR-IOV I/O devices to be accessed through a shared PCIe fabric. Sharing enables fewer I/O devices to be provisioned which can reduce system power consumption and hardware provisioning costs.
“The PCI-SIG IOV specification suite will allow the creation of a new generation of virtualization solutions, enabling PCI-SIG members to meet increasing customer demands for application consolidation, lower power consumption, and lower hardware provisioning costs,” said Renato Recio, PCI-SIG IOV workgroup co-chairman.
Virtualization solutions not only offer savings within the platform, but in some usage models such as the data center, they enable savings in the data center fabrics by reducing the number of switches, cables and physical footprint that need to be provisioned. These reductions will enable “green” solutions – saving costs and the environment.
PCI-SIG members can download the specifications at http://www.pcisig.com/specifications/iov/.
Benefits of PCI-SIG Membership
PCI-SIG members can participate in the review of all PCI specifications before they are released to the industry. If you are interested in becoming a member, please visit the PCI-SIG Web site at http://www.pcisig.com/membership. PCI-SIG members develop and maintain PCI Express specifications and are actively involved in defining compliance criteria and other technical enabling collateral.
As an additional and extremely valuable benefit of PCI-SIG membership, members are given the right to receive patent licenses from any other member of our organization with necessary claims of patent embodied within our specifications. These licenses may be limited in scope to an implementation of a particular specification, but must be granted to all members on reasonable and non-discriminatory terms.
About PCI-SIG
PCI-SIG is the Special Interest Group that owns and manages PCI specifications as open industry standards. The organization defines and implements new industry standard I/O (Input/Output) specifications as the industry’s local I/O needs evolve. The PCI Special Interest Group was formed in 1992 and became a nonprofit corporation, named “PCI-SIG,” in the year 2000. Currently, more than 900 industry-leading companies are active PCI-SIG members worldwide. PCI-SIG’s current directors are employed by the following PCI-SIG member companies: Agilent, AMD, Broadcom, HP, IBM, Intel, Microsoft, NVIDIA and Sun Microsystems. For more information about the PCI-SIG and its membership benefits, please visit the PCI-SIG Web site at http://www.pcisig.com or contact (503) 619-0569 (within the United States).
|
Related News
- Synopsys Announces DesignWare IP for PCI Express with PCI-SIG I/O Virtualization Technology
- PCI-SIG® Announces CopprLink™ Cable Specifications for PCIe® 5.0 and 6.0 Technology
- PCI-SIG Specifications Deliver PCI Express Technology to Mobile Devices
- NextIO Adopts Denali's Verification IP for New PCI Express Expansion and I/O Virtualization Module for Blade Systems
- Denali Announces Complete Bundle of I/O Virtualization Technology Solution With PureSpec PCI Express Verification IP
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |