English
180nm OTP Non Volatile Memory for Standard CMOS Logic Process
UMC tips roadmap, questions 450-mm
Mark LaPedus, EE Times
(06/10/2008 11:04 PM EDT)
ANAHEIM, Calif. -- At the Design Automation Conference (DAC) here, Taiwan foundry provider United Microelectronics Corp. (UMC) outlined its process roadmap and announced several alliances with the EDA community.
And unlike its rival on the island, UMC, the world's second largest foundry vendor, said that it is not pushing the next-generation 450-mm wafer size.
UMC (Hsinchu) has been ramping up 65-nm processes for some time, but it will shortly move into the 45- and 40-nm nodes. Like its foundry rivals, the company has pushed out its high-k and metal gate solution to the 32-nm node.
As of late, the company has been somewhat less vocal about its cutting-edge process technologies, as compared to IBM's ''fab club'' and Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC). "We're definitely not behind," said Lee Chung, vice president of the corporate marketing division at UMC.
(06/10/2008 11:04 PM EDT)
ANAHEIM, Calif. -- At the Design Automation Conference (DAC) here, Taiwan foundry provider United Microelectronics Corp. (UMC) outlined its process roadmap and announced several alliances with the EDA community.
And unlike its rival on the island, UMC, the world's second largest foundry vendor, said that it is not pushing the next-generation 450-mm wafer size.
UMC (Hsinchu) has been ramping up 65-nm processes for some time, but it will shortly move into the 45- and 40-nm nodes. Like its foundry rivals, the company has pushed out its high-k and metal gate solution to the 32-nm node.
As of late, the company has been somewhat less vocal about its cutting-edge process technologies, as compared to IBM's ''fab club'' and Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC). "We're definitely not behind," said Lee Chung, vice president of the corporate marketing division at UMC.
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