Virage Logic Unveils One Mega-Bit Embedded Reprogrammable Non-Volatile Memory (NVM) on Standard CMOS Process

emPROM(TM) Memory System Provides Secure NVM for Flexible, High-Density Code Storage in SoCs with No Additional Mask or Process Steps

FREMONT, Calif. -- June 16, 2008 --Virage Logic Corporation, the semiconductor industry’s trusted IP partner and pioneer in Silicon Aware IP™, today announced the emPROM™ Memory System, a new family of embedded multi-time programmable (MTP) non-volatile memory (NVM) for flexible program code storage in System-on-Chip (SoC) devices. Combining user-defined functionality with Virage Logic’s high-capacity read-only memory (ROM) and NOVeA® Flash memory, emPROM provides secure, fully integrated embedded NVM for SoC designs requiring up to 16 Megabits of code storage and is manufactured on industry standard CMOS processes with no additional mask or process steps. Ideally suited for high-volume consumer, industrial, automotive and military applications, emPROM is specified for a minimum of up to 100,000 program cycles with 10-year data retention at 125 degrees Celsius.

The emPROM Memory System addresses the critical issues of SoC code security, performance, power consumption and special process requirements. Most SoC designs in production today use a two-chip solution to implement and execute program code, a Flash memory for program storage and the SoC containing the embedded processor, which executes the program instructions. This implementation introduces significant security vulnerability as data crosses chip boundaries from the Flash memory to the SoC. This is true even with system-in-package (SIP) implementations where multiple die are combined in a single package. In addition, a two-chip solution increases manufacturing costs, including system area and power consumption, while reducing overall performance and reliability. Virage Logic’s emPROM provides higher system performance and lower power consumption by enabling wider internal data paths and eliminating external I/Os. By eliminating the external Flash memory device, emPROM improves design security and reliability while reducing system size and manufacturing costs.

“Microcode is one of the most valuable assets that an SoC has to manage, and keeping that code secure has become a critical design objective,” said Richard Wawrzyniak, senior market analyst, ASIC and SoC for Semico Research. “Virage Logic’s emPROM Memory System offers an optimized solution, combining cost effective, secure high density code storage with programming flexibility, while still remaining true to standard manufacturing processes.”

There are a few embedded high-density memory solutions available today including embedded Flash, one-time-programmable (OTP) and ROM. While embedded Flash is available for production at some foundries on mature process nodes, this type of memory requires additional masks and process steps, which increase overall manufacturing costs. In fact, as a result of the additional manufacturing costs incurred by utilizing an embedded Flash process, SoC die costs can increase dramatically as the overall die size increases relative to the amount of embedded Flash memory required.

By its very nature, OTP memory can only be programmed once, rendering it useless in the event of bit failures or code changes. While ROM offers the lowest cost memory, it is configured during wafer production, making it the least flexible in terms of implementing code changes.

“The introduction of emPROM fills a critical void by providing a secure, flexible embedded NVM on a standard CMOS process,” said Joel Rosenberg, senior marketing director for non-volatile memory and military products for Virage Logic. “By combining user-defined functionality with proven ROM and NOVeA Flash technology, we are addressing the need to provide cost-effective, high-density, flexible NVM on a standard CMOS process. In addition to processor code storage, emPROM can be used to enable in-system programmable feature selection for specific markets and applications as well as microcode encryption. The emPROM Memory System’s support for user-defined functionality provides virtually unlimited flexibility to implement a variety of cost-effective memory functions.

“By building so much capacity and flexibility into standard SoC design, we feel the emPROM solution fulfills the true ‘system-on-chip’ purpose of SoC designs more than any other approach,” added Rosenberg. “More than that, by providing users the ability to modify and keep current the system in the most cost-effective and secure way, this approach to embedded memory protects the value of the manufacturer’s considerable SoC investment.”

Pricing and Availability

Virage Logic’s emPROM Memory System is available now along with a 90nm reference design. The reference design includes a project license for a 1Mbit Via ROM, 4Kbit NOVeA 3.0, emPROM processor, RTL source code and documentation. emPROM pricing starts at $90,000.

About the emPROM Memory System

The emPROM (embedded multi-time Programmable Read-Only Memory) Memory System provides high density embedded NVM on a standard CMOS process with no additional mask or process steps. emPROM is currently available in configurations ranging from 16K to 16Mbits. Designed for secure, single-chip code storage applications, emPROM provides the low cost and high density of ROM with the flexibility of Flash. The emPROM Memory System combines user-defined functionality with a resident emPROM processor, up to 16Mbit ROM and up to 16Kbit NOVeA Flash Memory. Applications include code storage, patch code, feature selection and encryption. Many other functions are possible with the implementation of user-defined functionality. emPROM is designed for manufacture on standard CMOS processes ranging from 180nm to 45nm at foundries and IDMs. emPROM addresses the limitations of other NVM solutions used for code storage by eliminating security gaps introduced by external Flash memory, overcomes the lack of design and manufacturing flexibility of ROM, and is fully testable when compared to OTP memory.

About NOVeA

Introduced in 2002 as the industry’s first commercially available non-volatile memory produced on a standard CMOS process with no additional mask or process steps, NOVeA (NOn-Volatile, electrically Alterable) is currently available in configurations ranging from 32 bits to 16,384 bits. Designed for secure applications, NOVeA addresses the common requirement for a small amount of embedded NVM on a standard CMOS process in high-volume RFID, digital rights management, encryption, wireless, sensor, DSP, code storage and other MTP designs ranging from consumer to military applications. NOVeA is available today for manufacture at seven wafer foundries and integrated device manufacturers (IDMs), and is designed for CMOS process nodes ranging from 180nm to 45nm. In addition to multi-time programmable applications, NOVeA can be used in designs requiring one-time programmable NVM, such as analog trimming, programmable fuses, and device ID or device options. Unlike one-time programmable technologies, NOVeA is based on proven low power, Fowler-Norheim tunneling which enables 100 percent verification of each programming element at test, resulting in the highest possible program yield in field. Due to their inherent nature, one-time programmable memory can not be 100 percent verified during wafer testing, which can result in costly SoC failures when single bits fail to program during production or in the field. Depending on process, NOVeA is reprogrammable in-system up to 100,000 times and has specified storage temperature of 125 degrees Celsius with minimum data retention of 10 years.

About Virage Logic

Founded in 1996, Virage Logic Corporation rapidly established itself as a technology and market leader in providing advanced embedded memory intellectual property (IP) for the design of complex integrated circuits. The company’s Silicon Aware IP™ offering (embedded memories, logic libraries and I/Os) includes silicon behavior knowledge for increased predictability and manufacturability. Through its acquisition of Ingot Systems in 2007, the company expanded its product offering to include Application Specific IP (ASIP) solutions such as Double Data Rate (DDR) Memory Controllers and design services. The highly differentiated product portfolio provides higher performance, lower power, higher density and optimal yield to foundries, integrated device manufacturers (IDMs) and fabless customers. The company uses its FirstPass-Silicon Characterization Lab™ for certain products to help ensure high quality, reliable IP across a wide range of foundries and process technologies. For more information, visit www.viragelogic.com.