Analyst: Cadence/Mentor merger "a bad idea"
(06/17/2008 2:54 PM EDT)
URL: http://www.eetimes.com/showArticle.jhtml?articleID=208700171
SAN JOSE, Calif. — Cadence Design Systems is under pressure and may lose its top spot in the electronic design automation sector, but its proposed $1.6 billion merger with Mentor Graphics is "a really bad idea," said a veteran EDA analyst.
"You would be sticking together two companies that have little synergy, lots of overlap and enough combined debt with the deal to make it hard to keep the pace in R&D," said Gary Smith, principal of Gary Smith EDA (Santa Clara, Calif.). "This deal would be like tying a boat anchor to the two companies and potentially sinking them both," he added.
E-mail This Article | Printer-Friendly Page |
Related News
- MosChip selects Cadence tools for the design of HPC Processor "AUM" for C-DAC
- Cadence Collaborates with Arm and Samsung Foundry on Delivery of 5LPE Flow for Mission-Critical Applications Using Next-Generation "Hercules" CPU
- Cadence Achieves TUV SUD's First Comprehensive "Fit for Purpose - TCL1" Certification in Support of Automotive ISO 26262 Standard
- Synopsys Extends Verification FastForward Program, Enabling Cadence Incisive and Mentor Graphics Questa Users to Adopt VCS Simulation with Fine-Grained Parallelism Technology
- Mentor's CEO on Merger Mania
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models