ProDesign CHIPit ASIC Prototyping System Accelerates Marvell ASIC Verification
SAN JOSE, Calif.-- June 26, 2008 --ProDesign, a leading supplier of scalable-high speed ASIC and SoC prototyping platforms, today announced that Marvell® Semiconductor’s Printer Division has successfully integrated the CHIPit prototyping flow. Marvell has successfully taped out a next-generation printer design using CHIPit in addition to other software verification tools utilized by Marvell, resulting in first-time-right silicon.
Marvell uses the flagship product named CHIPit Platinum Edition, which is a highly scalable FPGA-based prototyping product that offers a unique programmable FPGA interconnect architecture and many software debugging features.
CHIPit is being used for early design prototyping, system validation and software development. “We have several design teams that are using CHIPit platforms. It’s easy to share them between our teams and the platforms have significantly accelerated our development cycle. The ease of use and the high quality of the CHIPit product facilitated broad acceptance within our printer division,” said Greg Allen, Associate Vice President of the Embedded and Emerging Business Unit, Communications and Consumer Business Group at Marvell. “Designing a state-of-the-art SoC is a big investment and first-time-right silicon is a must. Selecting ProDesign has turned out to be a sound business and technical decision. CHIPit has become an important tool in our system emulation methodology,” added Allen.
The scalable CHIPit hardware gives Marvell the opportunity to leverage the investment over many product cycles, as well as the ability to include ProDesign’s service for individual daughter board developments.
“ProDesign has successfully designed daughter boards for any kind of system application and has worked from the schematic level to the populated and tested daughter boards. All boards have been delivered with the highest design quality and were well suited to Marvell’s requirements,” said Gerhard Scherer, President of ProDesign Electronics Corporation. Scherer continued, “The capability to offer additional services to our clients is a key for their success, because clients can offload work to our highly specialized team to save precious time for their project implementations.”
CHIPit is more than a prototyping tool. It is a complete product family that includes tools for design partitioning, implementation guidance and numerous debugging features for host-controlled, cycle-accurate or in-circuit debugging. The ability to change the interconnections between FPGAs on the fly to achieve pipelined or bus structures or a mixture of both in a split second, paired with the ability to establish a communication between a host software application with the design under test by using the UMRBus communication feature, catapults CHIPit out of the crowd of other FPGA boards in the market. Yet, CHIPit is easy to use.
About ProDesign
ProDesign is the creator of the CHIPit family of products for hardware assisted verification of ASIC and SoC designs. CHIPit provides a complete set of tools for design partitioning, implementation and debugging for any kind of hardware bring-up and software validation work. CHIPit is based on the great experience of a 26 years old veteran in the electronics market and has been a guarantor for successfully prototyping designs up to multi-million ASIC gates. ProDesign is one of the very few companies that can offer prototyping products together with additional service expertise to help our customers accomplish their goals.
For more information please visit http://www.uchipit.com
|
Related News
- ProDesign Launches the CHIPit Iridium Prototyping Suite
- ProDesign Completes ASIC Prototyping Product Portfolio With the New CHIPit QuickSilver
- ProDesign Introduces the CHIPit Platinum V5 and Reaches a New Level in High-End ASIC and SoC Prototyping
- ProDesign to Provide ASIC Prototyping and Verification for Tensilica's Diamond Standard Processors
- ProDesign CHIPit Prototyping Systems Supports Transaction Based Verification
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |