Tilera's TILEPro Multicore Processors Set New Performance Benchmark

TILEPro64(TM) Multicore Processor Delivers 35X Better Performance-per-Watt Over Intel Quad-Core Xeon and 15X the Performance of TI's DaVinci DSP

SAN JOSE, CA -- Sep 22, 2008 -- Just over a year after launching the world's highest performance embedded processor, Tilera(R) Corporation today announced its TILEPro(TM) family of processors, setting a new benchmark for performance. The TILEPro family includes two new processors: the TILEPro64 delivers 35X better performance-per-watt over the Quad-Core Xeon, and 15X the performance of the DaVinci DM6467 series DSP; while the TILEPro36 carries Tilera's performance, power efficiency, and programmability into mid-range applications.

Building on the success of its first generation TILE64(TM) processors -- selected by more than 45 customers to replace FPGAs, DSPs, and general-purpose processors -- Tilera's second generation processors offer double the performance in networking applications such as SNORT and nProbe.

"This second-generation of processors validates Tilera's unique approach to integrated signal processing and general purpose computing," said Omid Tahernia, Tilera's president and chief executive officer. "Customers are looking for a platform that solves their comprehensive compute needs with power efficiency and programmability. Additionally, The TILEPro family delivers on our promise of scalability by giving our customers a software and pin-compatible part for high to mid-range applications."

"Tilera has dramatically expanded the capabilities of its Tile line, but has maintained both hardware and software compatibility with last year's line-up," observed Nathan Brookwood, Research Fellow at Insight 64. "The new TILEPro64 delivers twice the performance of the earlier TILE64, with only nominal increase in power, while the TILEPro36 comes in at a lower cost for price-sensitive applications. All three versions drop into the same sockets and run the same software-compatible applications, thus giving OEMs the ability to easily scale their products' capabilities to match end-user customer requirements. What's not to like about that?"

TILEPro(TM) Technology

The TILEPro family greatly improves the performance of highly threaded and shared-memory applications through the introduction of Dynamic Distributed Cache (DDC(TM)) technology. Further, the TILEPro processors have twice the L1 cache size, double the L2 cache associativity, and incorporate an additional on-chip communication network dedicated to cache management. The new processors are equipped with additional instruction set extensions for audio and video that deliver up to 2X improvement in multimedia signal processing.

Version 2.0 of Tilera's Multicore Development Environment(TM) (MDE) supports the TILEPro family and includes enhancements to the development tools and run-time software. A new "zero overhead Linux" option offers all the benefits of a rich Linux operating system environment, with the timing predictability of a stripped-down task scheduler. MDE 2.0 also supports a "bare metal" programming environment with a thin services layer for signal processing and data plane applications.

Tilera's TILEPro64(TM)

The TILEPro64 is a multicore embedded processor that integrates 64 full-featured cores, four 800MHz DDR2 memory controllers and a complete array of high speed I/O and PCI Express interfaces. It can encode 10 streams of 1080p H.264 video (baseline profile) and execute over 20Gbps of pattern matching in networking applications.

Tilera's TILEPro36(TM)

Tilera's TILEPro36 offers the same new features as the TILEPro64, scaled to 36 cores. It is ideal for mid-range (1 to 5 Gbps) networking and security applications, videoconferencing endpoints, and midrange multimedia applications. The TILEPro36 processor integrates three DDR2 memory controllers and a complementary set of high speed I/O interfaces. It can deliver 5Gbps of Snort intrusion prevention processing and 3 streams of H.264 1080p video encode (baseline profile).

The Multicore Development Environment(TM) (MDE)

Tilera's MDE is an integrated set of tools and libraries, bringing simplicity to multicore programming and enabling programmers to harness the full potential of the TILE processor. The MDE offers support for C/C++, standard programming paradigms, and the most advanced multicore debugging and optimization tools.

Availability

The TILEPro64 will be sampling to qualified customers next month, the TILEPro36 in Q4, 2008.

More information on Tilera and the TILEPro family of processors can be found on its web site: www.tilera.com.

About Tilera

Tilera Corporation is the industry leader in highly scalable general purpose multicore TILE(TM) processor family for the embedded market. Tilera's processors are based on an innovative iMesh(TM) architecture that scales to hundreds of RISC-based cores on a single chip. The distributed nature of Tilera's revolutionary architecture and the standards-based tools, such as C/C++ compiler, GNU tools and Eclipse IDE, provide an unprecedented combination of performance, power efficiency and programming flexibility. Tilera was founded in October 2004 and launched its first product, the 64-core processor, in August 2007. The company is headquartered in San Jose, Calif. with locations in Westborough, Mass., Beijing and Bangalore, India.