Summit Partners With LEDA for Rules Checking

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Summit Partners With LEDA for Rules Checking

BEAVERTON, Ore.----Dec. 30, 1999--Summit Design, Inc., and LEDA S.A., of Grenoble, France, have announced an OEM agreement to allow Visual HDL users to validate synthesized VHDL or Verilog models against a given coding standard or customized rules. Under the agreement, Summit has integrated LEDA's established ProVHDL generic rule checker, and the new ProVerilog version, which were announced at the 37th Design Automation Conference, into Visual HDL.

``The issue here is coding quality and style. Customers are already able to simulate, functionally verify and debug their graphical images and code from within Visual HDL. This OEM agreement provides customers with the capability to verify adherence to in-house or industry coding standards, policies or rule sets,'' said Eric Benhayoun, vice president of european operations for Summit. Benhayoun added, ``The handshaking between Visual HDL and LEDA's tools is entirely transparent to the user. ProVHDL and ProVerilog rule checkers are executed from within the Visual HDL environment, and can verify either models that the designer has written, or models that have been generated by Visual HDL. Any errors detected will be displayed in Visual HDL error message windows, with full cause and effect traceability back to the graphical source for each of the error messages and warnings. The ProVHDL and ProVerilog option are available with the release 6.0 of Visual HDL.''

Serge Maginot, CEO of LEDA S.A., added, ``We believe that the generic rule checking function represents an extremely attractive option for Visual HDL users. By adding this verification facility to the model generation capabilities of Visual HDL, we believe we have created an exceptionally powerful capability for Summit customers.''

ProVHDL and ProVerilog from Summit are shipped with rules verifying the IEEE 1076.6 RTL synthesis subset as standard. Policies for verification of rules defined in the OMI326 VHDL Coding Standard and the Reuse Methodology Manual (RMM) are optionally made available from this agreement.

Although users can select a rule set from within Visual HDL, the user can not modify either customized or standard rules within this environment. Customers who want to implement in-house customized coding standards or sets of rules use a stand-alone and entirely separate tool from LEDA, the PROTON design rule Specifier. This is an important feature, and means that rule specification can be restricted to the group responsible for coding standards and quality guidelines.

ABOUT SUMMIT DESIGN

Summit Design, Inc. (NASDAQ:SMMT) is a leading international supplier of engineering software products in the areas of high-level design creation, analysis and verification. The world's top electronics companies use Summit products to increase engineering productivity, reduce development time and improve the quality of their products. Summit is located at 9305 SW Gemini Drive, Beaverton, Oregon, 97008; (503) 643-9281; http://www.summit-design.com.

ABOUT LEDA S.A.

LEDA S.A., Grenoble, France, specializes in EDA products and hardware description languages, especially VHDL and Verilog. It offers a complete set of front-end tools for tool builders, such as analyzers and elaborators for VHDL'93, VHDL-AMS and Verilog, as well as end-user tools for designers, such as ProVHDL and ProVerilog, the VHDL and Verilog Programmable Design Rule Checkers, and Krypton, a VHDL source encryption tool for IP protection. LEDA also offers services and consulting for HDL based CAD tool development and for HDL design rule customization. Further information about LEDA is available on the website: www.leda.fr.

Contact:
     Summit
     Rami Rachamim, 011-972-9-9708703
      OR
     Neesham PR
     Peter van der Sluijs, 44-(0) 1442-879222