Aldec offers Tcl/Tk integration tool

Tcl is a scripting language for launching and controlling external applications. Tk is a graphical user interface tool kit. Tcl/Tk lets users customize design environments with out having to learn proprietary foreign language interfaces. O'Brien said users can download prepared scripts from Aldec's Web site, which support most major FPGA synthesis and layout tools. Users can create their own Tcl/Tk scripts to develop interfaces to other tools.

Once the scripts are installed, the third-party tools can be invoked from the Active-HDL tools menu. When launched, the third-party tools will have their own user interfaces.

Tool Integrator is built into Active-HDL PE (Plus Edition) 3.6, and it supports Tcl/Tk version 8.0. Active-HDL is currently based around VHDL simulation, with Verilog simulation promised for early 2000. There is no additional charge for Tool Integrator. Active-HDL PE prices start at $5,200.

Aldec is also announcing an expansion of its training program for VHDL and Verilog design. The company offers Web-based training, regional language training and on-site training. Aldec also provides free HDL training materials from its We b site.