Arasan Chip Systems Drives Strategic Mobile Initiative with Release of MIPI DSI IP Solution
Accelerates Design of Mobile Phone SoCs with support for multiple Baseband and Display Interfaces
San Jose, California – Oct. 2, 2008 – Arasan Chip Systems Inc., “Arasan” a leader in Intellectual Property (IP) solutions – IP cores, Verification IP (VIP), Software Drivers and Stacks and Hardware Solutions, today announced the first Mobile Industry Processor Interface (MIPITM) Display Serial Interface (DSI) IP commercially available on the market. DSI is a high-speed, high-resolution, serial interconnect bus offering connectivity to display devices in cell phones, mobile internet devices and consumer products.
Arasan’s DSI IP cores are fully compliant with MIPI DSI specification 1.01 addressing all Host and Device requirements. Arasan’s highly configurable DSI IP is architected to support 1 to 4 lanes providing up to 4 Gbps throughput. It can support a variety of native host interfaces - AHB, AXI, OCP or customer specific interfaces, providing seamless integration into any baseband system. This seamless integration continues onto the display interface with support for Display Bus Interface (DBI) and/or Display Pixel Interface (DPI). Display Command Set (DCS), an application-layer specification for smart panels, is also supported.
“Following the recent announcement of our Strategic Mobile Initiative, Arasan is proud to be the first and only IP company to provide fully compliant DSI IP cores to the industry, demonstrating our commitment to our customers building the next generation mobile chipsets.” said Kevin Yee, Vice President of Marketing at Arasan. “Today, we have several key customers who have completed test and verification of their SoCs incorporating the Arasan cores.”
Designed for easy integration into any SoC development, the IP includes features to meet the diverse display needs in today’s rapidly changing mobile market: support for multiple display panels, virtual channels, command mode or video mode, higher resolutions, lower power and native interfaces to existing display interfaces. The DSI IP implementation will reduce pin count, power consumption and system costs while improving interoperability for next generation mobile devices. The Arasan IP cores provide a “Total IP Solution” for mobile digital display applications.
Availability
The Arasan DSI IP cores are readily available and have been validated in customer designs.
About Arasan
Arasan Chip Systems Inc. , based in San Jose, CA, USA, is a world leading supplier of IP and the “Total IP Solution” ranging from Intellectual Property (IP), Verification IP (VIP), Hardware Development Kits, Validation Platforms, Software Drivers / Stacks, and Design Services. Arasan delivers technology-leading IP solutions like MIPI, SD / SDIO, USB, PCI, Ethernet, MMC, CE-ATA, CF+, NAND and more, to the global electronics market. Arasan’s goal is to enable designers to accelerate their development and simplify their production of complex system-on-chip (SoCs). Arasan provides a competitive advantage through a combination of domain expertise, silicon proven IP, hardware / software tools, and customized service… the “Total IP Solution”.
|
Arasan Chip Systems Hot IP
Related News
- Arasan Chip Systems Builds On Strategic Mobile Initiative With MIPI CSI-2 IP Solution Release
- Arasan Chip Systems adds MIPI HSI IP to its Strategic Mobile Initiative Program
- Arasan Chip Systems Extends Its Strategic Mobile Initiative by Offering MIPI UniPro IP Solution
- Arasan Chip Systems Reveals Strategic Mobile Initiative
- Arasan announces MIPI DSI IP for FPGA supporting full C-PHY 2.0 speeds
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |