Cadence Methodology Powers Samsung Electronics' Advanced SOC Design Environments
Cadence Methodology Powers Samsung Electronics' Advanced SOC Design Environments
SAN JOSE, Calif.----Dec. 16, 1999--Cadence Design Systems, Inc. (NYSE:CDN), the world's leading supplier of electronic design products and services, today announced that Samsung Electronics has adopted and integrated the Cadence® System Level Constraint (SLC) flow into its ASIC design environment.
A collaborative effort between Samsung Electronics and Cadence created a timing-driven, concurrent optimization methodology based on the SLC flow and Samsung Electronics' proprietary tools.
This achievement is the result of a growing, strategic relationship being forged between the two companies, and is the latest in a series of successful collaborations for Cadence Methodology Services. The timing convergent flow is a key component of the block-based design and platform-based design methodologies critical to system-on-a-chip (SOC) design. Cadence just announced the delivery of block-based design and platform-based design methodologies and tool flows to the Alba Centre in Scotland (See release ``Cadence Delivers Robust Portfolio of System-On-A-Chip Methodologies,'' Dec. 15, 1999).
``The integration and validation of the Cadence SLC flow into the Samsung Electronics' 0.25 and 0.18 micron design environments are the results of many months of hard work on the part of the two companies. Cadence Methodology Services and R&D teams worked together with Samsung Electronics development teams to help dramatically reduce the amount of time required to implement and validate these important enhancements to our methodology,'' said Dr. Hyunwoo Cho, senior manager, in charge of design methodology development for Samsung Electronics ASIC Division. ``The concurrent optimization technology in the SLC flow allows us to reduce overall design time by predictably reaching first-pass timing closure.''
The patent-pending SLC flow features Cadence's deep submicron (DSM) tools, which rely on proven timing control, logic optimization, and area conserving algorithms.
``Throughout the industry we have seen the need to re-engineer and retool methodologies to meet emerging new ASIC design requirements,'' said Jim Hogan, vice president of product marketing at Cadence. ``Samsung Electronics' actions in building a truly advanced methodology will directly benefit its customers by decreasing Samsung's development and delivery cycle time. The adoption of the Cadence DSM solution by a leading semiconductor company like Samsung Electronics is a testament to our technology.''
Immediate Deployment of Advanced Capability
Samsung Electronics has been deploying the new methodology throughout its worldwide design centers. This advanced approach leverages Cadence's market-leading SLC flow to ensure first-pass, all-path timing closure. Cadence Methodology Services helped strengthen the partnership by working together with Samsung Electronics' development teams to help integrate Samsung's proprietary tools with the SLC technology, achieving the optimum production flow in the shortest time possible. The new environment provides Samsung Electronics' ASIC customers with solutions for the key problems facing designers today: hierarchical design support, a convergent design methodology, and rapid turnaround of high-complexity designs.
About Samsung Electronics
Samsung Electronics Co., Ltd., with 1998 sales revenue of US$16.6 billion, is a world leader in the electronics industry. The Korea-based firm has operations in 46 countries and employs 42,000 people worldwide. The company consists of three main business divisions: Multimedia & Home Appliances, Semiconductors and Information & Telecommunications. For more information, visit the website, http://www.samsungelectronics.com.
About Cadence
Cadence is the largest supplier of electronic design automation products, methodology services, and design services used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products. With more than 4,000 employees and 1998 annual sales of $1.3 billion, Cadence has sales offices, design centers, and research facilities around the world. The Company is headquartered in San Jose, Calif. and traded on the New York Stock Exchange under the symbol CDN. More information about the company, its products and services may be obtained from the World Wide Web at http://www.cadence.com.
Note to Editors: Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. All others are properties of their holders.
Contact:
Cadence Design Systems, Inc.
Lisa Gillette-Martin, 408/894-2512
lgmartin@cadence.com
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