English
MoSys 1T-SRAM Embedded Memory Technology Meets TSMC 90 Nanometer eDRAM Process Standards
SUNNYVALE, Calif. -- Oct. 28 -- MoSys, Inc. (Nasdaq: MOSY), a leading provider of high-density system-on-chip (SoC) memory and analog/mixed-signal intellectual property (IP), today announced it has achieved Level III and IV verification of its 1T-SRAM embedded memory technology on TSMC's 90 nanometer (nm) General Purpose eDRAM process by the foundry's IP Alliance program.
TSMC's IP Alliance includes a quality management program that requires IP cores to demonstrate manufacturability and functionality. MoSys' 1T-SRAM memory macros have been tested and verified to Levels III and IV, including full characterization of seven-corner split wafer lots and full high temperature operating life (HTOL) testing on three distinct wafer lots.
"We are pleased to reach this important milestone in which MoSys' patented technologies were successfully incorporated into SoC designs fabricated using TSMC's 90 nm advanced processes," said Len Perham, President and Chief Executive Officer of MoSys. "By leveraging the extensive testing and stressing performed to reach TSMC Level III and IV compliance, MoSys can now more clearly demonstrate the reliability of MoSys' 1T-SRAM memories."
About MoSys, Inc.
Founded in 1991, MoSys (NASDAQ: MOSY), develops, markets and licenses innovative embedded memory and analog/mixed-signal intellectual property (IP) technologies for advanced SoCs used in a variety of home entertainment, mobile consumer, networking and storage applications. MoSys' patented 1T-SRAM and 1T-FLASH technologies offer a combination of high density, low power consumption, high speed and low cost unmatched by other available memory technologies. MoSys' advanced analog/mixed-signal technologies include a highly integrated Blu-ray DVD front-end and Gigabit Ethernet. MoSys' embedded memory IP has been included in more than 160 million devices demonstrating silicon-proven manufacturability in a wide range of processes and applications. MoSys is headquartered at 755 N. Mathilda Avenue, Sunnyvale, California 94085. More information is available on MoSys' website at http://www.mosys.com.
TSMC's IP Alliance includes a quality management program that requires IP cores to demonstrate manufacturability and functionality. MoSys' 1T-SRAM memory macros have been tested and verified to Levels III and IV, including full characterization of seven-corner split wafer lots and full high temperature operating life (HTOL) testing on three distinct wafer lots.
"We are pleased to reach this important milestone in which MoSys' patented technologies were successfully incorporated into SoC designs fabricated using TSMC's 90 nm advanced processes," said Len Perham, President and Chief Executive Officer of MoSys. "By leveraging the extensive testing and stressing performed to reach TSMC Level III and IV compliance, MoSys can now more clearly demonstrate the reliability of MoSys' 1T-SRAM memories."
About MoSys, Inc.
Founded in 1991, MoSys (NASDAQ: MOSY), develops, markets and licenses innovative embedded memory and analog/mixed-signal intellectual property (IP) technologies for advanced SoCs used in a variety of home entertainment, mobile consumer, networking and storage applications. MoSys' patented 1T-SRAM and 1T-FLASH technologies offer a combination of high density, low power consumption, high speed and low cost unmatched by other available memory technologies. MoSys' advanced analog/mixed-signal technologies include a highly integrated Blu-ray DVD front-end and Gigabit Ethernet. MoSys' embedded memory IP has been included in more than 160 million devices demonstrating silicon-proven manufacturability in a wide range of processes and applications. MoSys is headquartered at 755 N. Mathilda Avenue, Sunnyvale, California 94085. More information is available on MoSys' website at http://www.mosys.com.
|
||||||
Related News
- MoSys' 1T-SRAM embedded memory silicon-verified on 90-nanometer process
- MOSYS' 1T-SRAM Embedded memory verified on TSMC's Embedded Flash process
- MoSys and TSMC Extend 1T-SRAM Embedded Memory Licensing Agreement
- MoSys And TSMC Extend Collaboration Agreement To 90-Nanometer-Based 1T-SRAM
- ARM Announces First Production-Ready DDR1 And DDR2 Memory Interface IP On TSMC 90-Nanometer Process
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
|
E-mail This Article | 
|
|
Printer-Friendly Page |