Arteris Network on Chip (NoC) Selected by NEC Electronics Europe for Advanced Development of Complex SoC Applications
SAN JOSE, Calif. -- January 19, 2009 -- Arteris Inc., the leading developer of Network on Chip (NoC) solutions today announced that it has been selected by NEC Electronics Europe as the interconnect IP and tool solution supplier for advanced SoC design. NEC Electronics Europe will use the on-chip communication management capabilities of the Arteris NoC solution in the development of next-generation semiconductor products.
The NEC Electronics Europe development team chose the Arteris NoC solution for its ability to effectively manage the on-chip communication of complex SoC designs in 90, 55- and 40-nanometer (nm) process geometries. This includes efficient top level integration and management of multiple IP blocks in multiple IP communication protocols including APBTM , AHB and AXITM. Arteris NoC solution benefits include increased performance in excess of 500MHz, reduction of the number of global wires by 50%, lower power, and scalable quality of service.
“We have decided on Arteris NoC interconnect IP solution in order to improve the efficiency with which we deliver complex SoC platforms and their derivatives to our customers,” said Matthias Voigt, General Manager of Engineering Group at NEC Electronics Europe. “We trust that Arteris NoC IP solution has evolved to become a viable approach and offers significant benefits over hybrid bus interconnect technologies.”
“We are very excited to be working with the NEC Electronics Duesseldorf team and look forward to a long term and expanding relationship,” said Michel Telera, Arteris Vice President of Sales, Europe, Japan and Middle East “Applying our NoC solution to the advanced requirements of complex applications is indicative of the performance and complexity management benefits this approach can deliver. This agreement builds on the momentum we have seen in other geographic and application areas as NoC becomes more widely adopted.”
About Arteris
Arteris, Inc. provides Network-on-Chip (NoC) interconnect IP, NoC generation and verification tools to improve performance of system-on-chip (SoC) architectures for multimedia, mobile, telecom, and other applications. Arteris' NoC solution allows chip developers to implement scalable, efficient and high-performance SoC designs, overcoming limitations of traditional layered or pipelined bus-based architectures. Results obtained by using Arteris NoC Solution include lower power, higher performance, lower risk of development and faster delivery of complex SoCs while increasing profits.
Founded by networking experts, Arteris operates globally with headquarters in San Jose, California and an engineering center in Paris, France. Arteris is a private company backed by a group of international investors including TVM Capital, Crescendo Ventures, Ventech, Synopsys and DoCoMo Capital . More information can be found at www.arteris.com.
|
Arteris Hot IP
Related News
- Arteris FlexNoC Network-on-Chip (NoC) Solution Selected by LG Electronics for Multimedia SOC
- Arteris Network-on-Chip (NoC) Selected by Texas Instruments to Provide SoC Interconnect
- Arteris FlexNoc Network-On-Chip (NoC) Interconnect IP Selected by Nethra Imaging for Advanced Imaging SoCs
- Arteris Network-on-Chip (NoC) IP Selected by Mobileye for Camera-Based Driver Assistance Systems (DAS) SoC
- NTT Electronics Completes a Graphic SoC Design Using Arteris NoC Technology
Breaking News
- Logic Design Solutions launches Gen4 NVMe host IP
- ULYSS1, Microcontroller (MCU) for Automotive market, designed by Cortus is available
- M31 is partnering with Taiwan Cooperative Bank to launch an Employee Stock Ownership Trust to strengthen talent retention
- Sondrel announces CEO transition to lead next phase of growth
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
Most Popular
- Arm's power play will backfire
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PUFsecurity Collaborate with Arm on PSA Certified RoT Component Level 3 Certification for its Crypto Coprocessor to Provide Robust Security Subsystem Essential for the AIoT era
E-mail This Article | Printer-Friendly Page |