English
Video: USB 3.0 and power tool at DesignCon
Rick Merritt, EE Times
(02/04/2009 1:35 AM EST)
SANTA CLARA, Calif. — Silicon blocks for the emerging USB 3.0 interface and software tools to ease the job of power integrity design grabbed my attention on the show floor at DesignCon.
Stephane Hauradou, co-founder and chief technology officer of PLDA Inc., gave me a demo of his USB 3.0 block running in an FPGA with throughput of about 3.5 Gbits/s.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
|
||||||
Related News
- Renesas Electronics Introduces New USB 3.0 Host Controller with 85 Percent Reduced Power Consumption
- Synopsys Showcases Silicon-Proven DesignWare IP Solutions for SuperSpeed USB 3.0, DDR and PCI Express at DesignCon 2010
- Advanced USB 3.0 IP in 22nm boasting a very low power ULP and ULL Technology Licensed to Over 10 Global Customers
- USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP Cores for High Bandwidth, Low Power data communication in PCs, Mobiles, SSDs, and other Multimedia Devices.
- Orange Tree announces SuperSpeed USB 3.0 FPGA module
Breaking News
- MediaTek Adopts AI-Driven Cadence Virtuoso Studio and Spectre Simulation on NVIDIA Accelerated Computing Platform for 2nm Designs
- MIPI Alliance Announces Board Leadership Appointments
- Alphawave Semi Q4 2024 Trading and Business Update
- ST-GloFo fab plan shelved
- Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
Most Popular
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- Altera Launches New Partner Program to Accelerate FPGA Solutions Development
- Electronic System Design Industry Posts $5.1 Billion in Revenue in Q3 2024, ESD Alliance Reports
- Breaking Ground in Post-Quantum Cryptography Real World Implementation Security Research
- YorChip announces patent-pending Universal PHY for Open Chiplets