Video: USB 3.0 and power tool at DesignCon
Rick Merritt, EE Times
(02/04/2009 1:35 AM EST)
SANTA CLARA, Calif. — Silicon blocks for the emerging USB 3.0 interface and software tools to ease the job of power integrity design grabbed my attention on the show floor at DesignCon.
Stephane Hauradou, co-founder and chief technology officer of PLDA Inc., gave me a demo of his USB 3.0 block running in an FPGA with throughput of about 3.5 Gbits/s.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Related News
- Renesas Electronics Introduces New USB 3.0 Host Controller with 85 Percent Reduced Power Consumption
- Synopsys Showcases Silicon-Proven DesignWare IP Solutions for SuperSpeed USB 3.0, DDR and PCI Express at DesignCon 2010
- Advanced USB 3.0 IP in 22nm boasting a very low power ULP and ULL Technology Licensed to Over 10 Global Customers
- USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP Cores for High Bandwidth, Low Power data communication in PCs, Mobiles, SSDs, and other Multimedia Devices.
- Orange Tree announces SuperSpeed USB 3.0 FPGA module
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks