English
Viewpoint: Consolidation is all about timing
Norbert Meyer, VP of Strategic Projects, X-Fab
EETimes Europe (02/18/2009 12:42 PM EST)
It's time to shift the thought paradigm from "What fabs do I have today, and how do I fill them?" to "What fab base do I need five years from now and how do I get there?"
An ad campaign a few years ago posed a clear strategy choice: Whether to be wolf or sheep? Most semiconductor companies face a similar decision today: be active in market consolidation or risk being swallowed. Portfolios of half-empty fabs burning cash reduce strategic options and can threaten an IDM’s existence.
Many consolidation strategies are bound to fail. One example is entering the foundry business when the number of underutilized fabs is growing and overall demand is absent. Succeeding in the foundry business requires far more than simply offering fab capacity. Transferring products to other fabs takes too long to achieve a significant impact, if begun under pressure.
EETimes Europe (02/18/2009 12:42 PM EST)
It's time to shift the thought paradigm from "What fabs do I have today, and how do I fill them?" to "What fab base do I need five years from now and how do I get there?"
An ad campaign a few years ago posed a clear strategy choice: Whether to be wolf or sheep? Most semiconductor companies face a similar decision today: be active in market consolidation or risk being swallowed. Portfolios of half-empty fabs burning cash reduce strategic options and can threaten an IDM’s existence.
Many consolidation strategies are bound to fail. One example is entering the foundry business when the number of underutilized fabs is growing and overall demand is absent. Succeeding in the foundry business requires far more than simply offering fab capacity. Transferring products to other fabs takes too long to achieve a significant impact, if begun under pressure.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
|
||||||
Related News
- Viewpoint: Is semiconductor industry consolidation inevitable?
- Realtek Deploys Cadence Tempus Timing Solution to Deliver Working Silicon on N12 Design
- True Circuits Attends 60th Design Automation Conference, Celebrates 25 Years of Timing Excellence
- Tachyum Closes DDR5 Timing at over 6400MT/s Providing Massive Bandwidth for Prodigy Chip
- AMD and Xilinx Provide Update Regarding Expected Timing of Acquisition Close
Breaking News
- Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
- Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- YorChip announces patent-pending Universal PHY for Open Chiplets
- PQShield announces participation in NEDO program to implement post-quantum cryptography across Japan
Most Popular
- Qualitas Semiconductor Signs IP Licensing Agreement with Edge AI Leader Ambarella
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura's Cyberthreat Intelligence Tool
- Altera Launches New Partner Program to Accelerate FPGA Solutions Development
- Alchip Opens 3DIC ASIC Design Services
- Electronic System Design Industry Posts $5.1 Billion in Revenue in Q3 2024, ESD Alliance Reports