Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
Full debugging features at the lowest silicon cost with Dolphin Integration 16-bit microcontroller thanks to the innovative Virtual Clone
Its extremely low-cost Virtual Clone debugger is now proposed with the Flip80251 Typhoon, the new generation of 8051 upward compatible 16-bit microcontroller core.
The Virtual Clone package consists in a simple USB to JTAG adaptor which links a popular Software Development Kit running on a PC with the FPGA or the SoC embedding the 16-bit Flip80251 Typhoon and its unique “Processor Open Clone”, the POC peripheral.
“The POC squeezes into the SoC such a small silicon area, less than 0.012 mm2 at 0.18 µm,” explains Aurélie DESCOMBES, Product Manager for Microcontrollers at Dolphin, “that emulation and debugging features can be maintained inside without impacting its fabrication cost.”
In the case of a mixed signal SoC, such a flexibility is appraised by developers of software application: they can debug their program in the real SoC environment, i.e. with all analog peripherals active.
SoC integrators looking for a powerful and low-power core truly increasing the competitiveness of their SoC, can now benefit from a double chance: ultra small silicon area with a full and powerful set of debugging features.
For more data on the Virtual Clone and the set of debugging features, click here or contact Aurélie Descombes: logic@dolphin.fr
|
Dolphin Semiconductor Hot IP
Related News
- BIRD Owl, the new real-time debugging solution for the 16-bit microcontrollers, from Dolphin Integration
- Minimizing BoM cost and silicon area thanks to Dolphin Integration's iLR-LaDiable capless regulator
- Dolphin Integration: The first 16-bit MCU core 8051 upward compatible, achieving 0.4 DMIPS/MHz
- Dolphin Integration helps reducing BoM cost of IoT circuits thanks to a Panoply of Over Voltage regulators
- Shorter Time-To-Market thanks to the innovative SmartVision IDE from Dolphin Integration
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |