English
Denali Software First to Ship PCI Express 3.0 Controller IP Cores
Early Adopters of PCIe 3.0 to Benefit From Off-the-Shelf, Configurable PCIe IP Solution Targeting Increased Performance
SUNNYVALE, Calif. --, March 31, 2009 -- Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced availability and first customer shipments of the latest Denali Databahn(TM) controller IP cores, based on the current preliminary version of the PCI Express® (PCIe) 3.0 specification, for use in next-generation chip designs. Denali's Databahn IP product was selected by leading fabless semiconductor companies to accelerate the overall deployment of PCIe 3.0 technology into high-performance storage and networking systems. Among other key features, the preliminary PCIe 3.0 specification increases the PCIe 2.0 interconnect performance bandwidth from 5 GT/s to 8 GT/s while preserving compatibility with software and mechanical interfaces.
"Together with the strong market acceptance of our PCIe 3.0 verification IP solution, this announcement positions us as the leading provider of IP solutions for the emerging PCIe 3.0 technology," said David Lin, vice president of Marketing for Denali Software. "Denali continues to collaborate with high-end customers to leverage our PCIe design and verification expertise to deliver a complete and robust IP solution to hit their market windows."
As the industry's first-to-market PCIe 3.0 solution, Denali's Databahn IP product provides full support of the preliminary PCIe 3.0 specification features including: TLP Prefix, Atomic Operations, Resizable BARS, Alternative Routing-ID, scalable architecture up to 16 lanes, PIPE specification Gen 3, as well as support for Single-Root I/O Virtualization. Access more detailed info about Databahn PCIe IP features and request an evaluation at: www.denali.com/en/products/databahn_pcie.jsp.
About Denali's PCI Express Solutions
Denali's extensive portfolio for deploying PCIe technology includes the industry's leading verification IP, design IP, and compliance suite, which are leveraged in an efficient ecosystem of IP and EDA vendors, PHY providers, and ASIC vendors and foundries. Learn more about the industry's most trusted solutions for PCIe technology at: www.denali.com/pcie.
About Denali Software
Denali Software, Inc. is a world-leading provider of electronic design automation (EDA) software and intellectual property (IP) for system-on-chip (SoC) design and verification. Denali delivers the industry's most trusted solutions for deploying PCI Express, USB, NAND Flash and DDR DRAM subsystems. Developers use Denali's EDA, IP and services to reduce risk and speed time-to-market for electronic system and chip design. Denali is headquartered in Sunnyvale, California and has offices around the world to serve the global electronics industry. More information about Denali, its products and services is available at www.denali.com.
SUNNYVALE, Calif. --, March 31, 2009 -- Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced availability and first customer shipments of the latest Denali Databahn(TM) controller IP cores, based on the current preliminary version of the PCI Express® (PCIe) 3.0 specification, for use in next-generation chip designs. Denali's Databahn IP product was selected by leading fabless semiconductor companies to accelerate the overall deployment of PCIe 3.0 technology into high-performance storage and networking systems. Among other key features, the preliminary PCIe 3.0 specification increases the PCIe 2.0 interconnect performance bandwidth from 5 GT/s to 8 GT/s while preserving compatibility with software and mechanical interfaces.
"Together with the strong market acceptance of our PCIe 3.0 verification IP solution, this announcement positions us as the leading provider of IP solutions for the emerging PCIe 3.0 technology," said David Lin, vice president of Marketing for Denali Software. "Denali continues to collaborate with high-end customers to leverage our PCIe design and verification expertise to deliver a complete and robust IP solution to hit their market windows."
As the industry's first-to-market PCIe 3.0 solution, Denali's Databahn IP product provides full support of the preliminary PCIe 3.0 specification features including: TLP Prefix, Atomic Operations, Resizable BARS, Alternative Routing-ID, scalable architecture up to 16 lanes, PIPE specification Gen 3, as well as support for Single-Root I/O Virtualization. Access more detailed info about Databahn PCIe IP features and request an evaluation at: www.denali.com/en/products/databahn_pcie.jsp.
About Denali's PCI Express Solutions
Denali's extensive portfolio for deploying PCIe technology includes the industry's leading verification IP, design IP, and compliance suite, which are leveraged in an efficient ecosystem of IP and EDA vendors, PHY providers, and ASIC vendors and foundries. Learn more about the industry's most trusted solutions for PCIe technology at: www.denali.com/pcie.
About Denali Software
Denali Software, Inc. is a world-leading provider of electronic design automation (EDA) software and intellectual property (IP) for system-on-chip (SoC) design and verification. Denali delivers the industry's most trusted solutions for deploying PCI Express, USB, NAND Flash and DDR DRAM subsystems. Developers use Denali's EDA, IP and services to reduce risk and speed time-to-market for electronic system and chip design. Denali is headquartered in Sunnyvale, California and has offices around the world to serve the global electronics industry. More information about Denali, its products and services is available at www.denali.com.
|
||||||
Related News
- Industry's Highest Capacity PCI Express 3.0 Controller IP Core From Denali Software Adopted by Cray
- Denali Software First to Announce Verification IP for PCI Express 3.0 Designs
- Synopsys DesignWare IP First to Support Final Release of PCI Express 3.0 Specification
- PLDA and M31 Announce a Compliant PCI Express 3.0 Solution Including PLDA's XpressRICH3 Controller and M31's PHY IP for the TSMC 28HPC+ Process Node at 8 GT/s
- Mobiveil Teams With Semtech to Provide SoC Designers a Verified PCI Express(R) 3.0 Controller and PCI Express 3.0 PHY IP Solution
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
|
E-mail This Article | 
|
|
Printer-Friendly Page |