Altera's 40-nm Stratix IV GX FPGAs Achieve PCI-SIG Compliance for the PCI Express 2.0 Architecture
San Jose, Calif. -- April 1, 2009 -- Altera Corporation (NASDAQ:ALTR) today announced its 40-nm Stratix® IV GX FPGAs are compliant with version 2.0 of the PCI Express® (PCIe®) standard, providing users a comprehensive PCIe solution for high-bandwidth applications. The devices successfully passed the testing procedures of the PCI-SIG® compliance workshop and are now included on the PCI-SIG Integrators List. Stratix IV GX FPGAs achieved compliance for PCIe 1.1 and PCIe 2.0 up to x8 lane configurations for end-point applications. Stratix IV GX FPGAs are shipping today with PCIe 2.0 hard intellectual property (IP) blocks.
Altera's high-performance Stratix IV GX FPGAs feature integrated transceivers with data rates up to 8.5 Gbps along with up to four PCIe hard IP blocks supporting end-point and root-port applications. The device's PCIe IP blocks embed all layers of the PCIe protocol stack, including the physical layer, data-link layer and transaction layer. The IP blocks are PCIe 1.1 and PCIe 2.0 compliant in x1-, x4- and x8-lane configurations.
“Our 40-nm Stratix IV family delivers the highest performance, best-in-class transceivers and a rich set of optimized IP to accelerate time-to-market in high-performance applications,” said Luanne Schirrmeister, senior director of component product marketing at Altera. “Passing PCI-SIG compliance testing enables users to choose Stratix IV GX FPGAs for their PCIe designs without worry. It is yet another successfully executed milestone met by our industry-leading engineering team.”
Stratix IV GX FPGAs support leading-edge high-bandwidth applications by delivering unprecedented system bandwidth with superior signal integrity. Featuring up to 48 low-power transceivers operating between 600 Mbps and 8.5 Gbps, Stratix IV GX FPGAs offer a complete, programmable solution for the growing number of applications and protocols requiring high-speed serial transceivers. In addition to support for PCIe, Stratix IV GX FPGAs support a wide range of protocols including Serial RapidIO®, Gigabit Ethernet, XAUI, CPRI (including 6G CPRI), CEI 6G, GPON, SFI-5.1 and Interlaken.
Pricing and Availability
Stratix IV GX FPGAs are currently available. Contact your Altera® sales representative for pricing. For more information about Altera's Stratix IV GX FPGAs, visit www.altera.com/pr/stratix4. To learn more about the PCIe capabilities featured in Stratix IV FPGAs, visit www.altera.com/products/ip/iup/pci-express/m-alt-pcie8.html.
About Altera
Altera programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more at www.altera.com.
|
Intel FPGA Hot IP
Related News
- Altera's 40-nm Arria II GX FPGAs Achieve PCI-SIG Compliance for PCIe Express 2.0 Specification
- Altera Stratix V GX FPGAs Achieve PCIe Gen3 Compliance and Listing on PCI-SIG Integrators List
- Mobiveil's GPEX PCI Express 3.0 IP Passes PCI-SIG PCIe 3.0 Compliance Testing
- PLDA's XpressRICH3-AXI PCI Express 3.0 IP with AMBA AXI Support Passes PCI-SIG PCIe 3.0 Compliance Testing
- PLDA's XpressRICH3 PCI Express 3.0 IP Passes PCI-SIG PCIe 3.0 Compliance Testing
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |