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TSMC Announces Foundry's First Mixed Signal/RF Reference Design Kit
Silicon-proven Reference Design Approach Accelerates RF Designs and Enables Systems-on-Chip Integration
HSINCHU, Taiwan -- April 21, 2009 -- Taiwan Semiconductor Manufacturing Company, Ltd. today unveiled the foundry industry's first Mixed Signal/Radio Frequency Reference Design Kit (MS/RF RDK) at its North American Technology Symposium in San Jose. The RDK initially targets 65nm process technology and aims to accelerate analog, mixed-signal, and RF designs and RF SoC verification and integration. The MS/RF RDK is the result of multi-year collaboration between TSMC and Cadence Design Systems and represents one of the initial deliverables of the TSMC Open Innovation Platform(TM).
The new RDK helps resolve the long-standing challenge of full chip verification of SoCs with both analog, mixed signal and digital content. It enables a top-down MS/RF design methodology and a system-level simulation flow to reduce design cycle time and encourage IP reuse. The reference design in the RDK is an advanced Fractional-N Phase Locked Loop (PLL) developed in TSMC 65nm RF process technology and fully validated in silicon with accurate correlation between simulation results and silicon measurements.
The RDK includes a video tutorial and step-by-step design manual; the complete PLL reference design database with schematics, layouts, and simulation test benches; a design flow and methodology introduction; silicon test reports, release notes specifying design tool and version requirements and a TSMC 65nm process design kit (PDK).
"Enhancing innovation in the MS/RF design space is one key initiative of the TSMC Open Innovation Platform," explains ST Juang, senior director of Design Infrastructure Marketing at TSMC. "The TSMC MS/RF RDK delivers a new level of confidence to our customers that complex MS/RF blocks can be created and accurately verified in the context of full chip RF SoCs, and taped out with high quality, thus ensuring first-pass silicon success. We continue to collaborate with our ecosystem partners to enhance the features and capabilities of the RDK to address emerging MS/RF design challenges."
Pricing and Availability
The TSMC 65nm MS/RF RDK is available now in limited release and at no charge to selective customers during Q2 2009. General release to other customers is targeted for Q3 2009. Customers may access the MS/RF RDK at the TSMC Online customer design portal http://online.tsmc.com/online/ or contact their local sales and support representatives for details.
About TSMC
TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology and the foundry's largest portfolio of process-proven libraries, IP, design tools and reference flows. The Company's total managed capacity in 2008 exceeded 9 million (8-inch equivalent) wafers, including capacity from two advanced 12-inch - GigaFabs (TM), four eight-inch fabs, one six-inch fab, as well as TSMC's wholly owned subsidiaries, WaferTech and TSMC (China), and its joint venture fab, SSMC. TSMC is the first foundry to provide 40nm production capabilities. Its corporate headquarters are in Hsinchu, Taiwan. For more information about TSMC please visit http://www.tsmc.com.
HSINCHU, Taiwan -- April 21, 2009 -- Taiwan Semiconductor Manufacturing Company, Ltd. today unveiled the foundry industry's first Mixed Signal/Radio Frequency Reference Design Kit (MS/RF RDK) at its North American Technology Symposium in San Jose. The RDK initially targets 65nm process technology and aims to accelerate analog, mixed-signal, and RF designs and RF SoC verification and integration. The MS/RF RDK is the result of multi-year collaboration between TSMC and Cadence Design Systems and represents one of the initial deliverables of the TSMC Open Innovation Platform(TM).
The new RDK helps resolve the long-standing challenge of full chip verification of SoCs with both analog, mixed signal and digital content. It enables a top-down MS/RF design methodology and a system-level simulation flow to reduce design cycle time and encourage IP reuse. The reference design in the RDK is an advanced Fractional-N Phase Locked Loop (PLL) developed in TSMC 65nm RF process technology and fully validated in silicon with accurate correlation between simulation results and silicon measurements.
The RDK includes a video tutorial and step-by-step design manual; the complete PLL reference design database with schematics, layouts, and simulation test benches; a design flow and methodology introduction; silicon test reports, release notes specifying design tool and version requirements and a TSMC 65nm process design kit (PDK).
"Enhancing innovation in the MS/RF design space is one key initiative of the TSMC Open Innovation Platform," explains ST Juang, senior director of Design Infrastructure Marketing at TSMC. "The TSMC MS/RF RDK delivers a new level of confidence to our customers that complex MS/RF blocks can be created and accurately verified in the context of full chip RF SoCs, and taped out with high quality, thus ensuring first-pass silicon success. We continue to collaborate with our ecosystem partners to enhance the features and capabilities of the RDK to address emerging MS/RF design challenges."
Pricing and Availability
The TSMC 65nm MS/RF RDK is available now in limited release and at no charge to selective customers during Q2 2009. General release to other customers is targeted for Q3 2009. Customers may access the MS/RF RDK at the TSMC Online customer design portal http://online.tsmc.com/online/ or contact their local sales and support representatives for details.
About TSMC
TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology and the foundry's largest portfolio of process-proven libraries, IP, design tools and reference flows. The Company's total managed capacity in 2008 exceeded 9 million (8-inch equivalent) wafers, including capacity from two advanced 12-inch - GigaFabs (TM), four eight-inch fabs, one six-inch fab, as well as TSMC's wholly owned subsidiaries, WaferTech and TSMC (China), and its joint venture fab, SSMC. TSMC is the first foundry to provide 40nm production capabilities. Its corporate headquarters are in Hsinchu, Taiwan. For more information about TSMC please visit http://www.tsmc.com.
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