Galileo Technology To Use Tensilica Processor IP
Galileo Technology To Use Tensilica Processor IP
Santa Clara, Calif., August 16, 1999 - TensilicaTM Inc., a Santa Clara-based provider of application-specific processor technology, today announced that Galileo Technology has entered into a license agreement with the company for its XtensaTM processor technology. Galileo will use Tensilicas processor generator for the development of embedded microprocessors for use in variety of future data communications system-on-silicon products.
Speaking for Galileo Technology, Avigdor Willenz, Chief Executive Officer, said "As part of our goal to provide advanced communications systems on silicon, we are continually evaluating new technologies. Tensilica's Xtensa processor technology gives us the unique combination of exceptional performance, instruction set customization, and DSP capability that are required in our future products."
Bernie Rosenthal, Tensilica's vice president of marketing and business development, said "We are delighted to welcome Galileo Technology to our growing family of charter users. Galileo is a leader in its field and has the capabilities to exploit the intrinsic benefits of our Xtensa architecture throughout its range of products."
About Galileo Technology
Galileo Technology, (NASDAQ: GALT), a market leader in complex data communications systems on silicon, is one of the semiconductor industry's fastest growing suppliers of complex, high-performance, integrated circuits.
Galileo's products include single-chip Ethernet switches, high-performance system controllers for RISC processors, and WAN communications controllers. Galileo's products form the heart of many advanced data communications systems built by leading OEMs, such as Cisco Systems, Hewlett Packard, Nortel Networks, D-Link, Accton, NBase Communications and Intel.
Galileo employs more than 200 people worldwide with business headquarters in San Jose, California and R&D headquarters in Manof, Israel. For more information, visit Galileo's website at http://www.galileoT.com.
About Tensilica
Tensilica was founded in July 1997 to address the fast growing market for application-specific microprocessor cores and software development tools in high volume, embedded systems. Using the company's proprietary XtensaTM Processor Generator, system-on-a-chip (SOC) designers can develop a processor subsystem hardware design and a complete software development tool environment tailored to their specific requirements in hours. Tensilica's solutions provide a proven, easy-to-use, methodology that enables designers to achieve optimum application performance in minimum design time. The Company has over 50 engineers engaged in research, development, and customer support from its offices in Santa Clara, California, Waltham, Massachusetts, and Yokohama, Japan.
Tensilica is headquartered in Santa Clara, California (95054) at 3255-6 Scott Boulevard, and can be reached at (408) 986-8000 or via the World Wide Web at http://www.tensilica.com
"Tensilica" and "Xtensa" are the trademarks belonging to Tensilica Inc.
Related News
- Cygnus to deliver GNUPRO software for MIPS-based processor cores <!--<FONT SIZE=-1>(by Peter Clarke - EE-TIMES)</FONT>-->
- Sun Amplifies Community Source Licensing Program with Addition Of 32-Bit SPARC (TM) Processor Design <!--<FONT SIZE=-1>(by Peter Clarke - EE-TIMES)</FONT>-->
- Altera and New AMPPSM Partner ARC Cores Announce Configurable RISC Processor For APEX(tm) 20K Devices <!--<FONT SIZE=-1>(by Peter Clarke - EE-TIMES)</FONT>-->
- Early users of IP cores could gain an edge from design reuse <FONT SIZE=-1>(by Peter Clarke - EE-TIMES)</FONT>
- Eonic Systems' Virtuoso(tm) 4.1 now shipping! <!--<FONT SIZE=-1>(by Peter Clarke - EE-TIMES)</FONT>-->
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |